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ADE7878 数据表(PDF) 46 Page - Analog Devices |
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ADE7878 数据表(HTML) 46 Page - Analog Devices |
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46 / 92 page ![]() ADE7878 Rev. 0 | Page 46 of 92 Energy Accumulation Modes The active power accumulated in each watt-hour accumulation 32-bit register (AWATTHR, BWATTHR, CWATTHR,AFWATTHR, BFWATTHR, and CFWATTHR) depends on the configuration of Bit 5 and Bit 4 (CONSEL bits) in the ACCMODE[7:0] register. The various configurations are described in Table 14. Table 14. Inputs to Watt-Hour Accumulation Registers CONSEL AWATTHR BWATTHR CWATTHR 00 VA × IA VB × IB VC × IC 01 VA × IA 0 VC × IC 10 VA × IA VB × IB VC × IC VB = −VA − VC 11 VA × IA VB × IB VC × IC VB = −VA Depending on the polyphase meter service, choose the appropriate formula to calculate the active energy. The American ANSI C12.10 standard defines the different configurations of the meter. Table 15 describes which mode should be chosen in these various configurations. Table 15. Meter Form Configuration ANSI Meter Form Configuration CONSEL 5S/13S 3-wire delta 01 6S/14S 4-wire wye 10 8S/15S 4-wire delta 11 9S/16S 4-wire wye 00 Bits[1:0] (WATTACC[1:0]) in the ACCMODE[7:0] register determine how the CF frequency output can be generated as a function of the total and fundamental active powers. Whereas the watt-hour accumulation registers accumulate the active power in a signed format, the frequency output can be generated in signed mode or in absolute mode as a function of the WATTACC[1:0] bits. See the Energy-to-Frequency Conversion section for details. Line Cycle Active Energy Accumulation Mode In line cycle energy accumulation mode, the energy accumula- tion is synchronized to the voltage channel zero crossings such that active energy is accumulated over an integral number of half-line cycles. The advantage of summing the active energy over an integer number of line cycles is that the sinusoidal compo- nent in the active energy is reduced to 0. This eliminates any ripple in the energy calculation and allows the energy to be accumulated accurately over a shorter time. By using the line cycle energy accumulation mode, the energy calibration can be greatly simplified, and the time required to calibrate the meter can be significantly reduced. In line cycle energy accumulation mode, the ADE7878 transfers the active energy accumulated in the 32-bit internal accumulation registers into the xWATHHR[31:0] or xFWATTHR[31:0] register after an integral number of line cycles, as shown in Figure 64. The number of half-line cycles is specified in the LINECYC[15:0] register. ZERO CROSSING DETECTION (PHASE A) ZERO CROSSING DETECTION (PHASE B) CALIBRATION CONTROL ZERO CROSSING DETECTION (PHASE C) LINECYC[15:0] AWATTHR[31:0] ZXSEL[0] IN LCYCMODE[7:0] ZXSEL[1] IN LCYCMODE[7:0] ZXSEL[2] IN LCYCMODE[7:0] OUTPUT FROM LPF2 AWGAIN AWATTOS ACCUMULATOR WTHR[47:0] 32 BIT REGISTER Figure 64. Line Cycle Active Energy Accumulation Mode The line cycle energy accumulation mode is activated by setting Bit 0 (LWATT) in the LCYCMODE[7:0] register. The energy accu- mulation over an integer number of half-line cycles is written to the watt-hour accumulation registers after LINECYC[15:0] number of half-line cycles are detected. When using the line cycle accumulation mode, the Bit 6 (RSTREAD) of the LCYCMODE[7:0] register should be set to Logic 0 because the read with reset of watt-hour registers is not available in this mode. Phase A, Phase B, and Phase C zero crossings are, respectively, included when counting the number of half-line cycles by setting Bits[5:3] (ZXSEL) in the LCYCMODE[7:0] register. Any combi- nation of the zero crossings from all three phases can be used for counting the zero crossing. Select only one phase at a time for inclusion in the zero crossings count during calibration. The number of zero crossings is specified by the LINECYC[15:0] 16-bit unsigned register. The ADE7878 can accumulate active power for up to 65,535 combined zero crossings. Note that the internal zero-crossing counter is always active. By setting Bit 0 (LWATT) in the LCYCMODE[7:0] register, the first energy accumulation result is, therefore, incorrect. Writing to the LINECYC[15:0] register when the LWATT bit is set resets the zero-crossing counter, thus ensuring that the first energy accumulation result is accurate. At the end of an energy calibration cycle, Bit 5 (LENERGY) in the STATUS0[31:0] register is set. If the corresponding mask bit in the MASK0[31:0] interrupt mask register is enabled, the IRQ0 pin also goes active low. The status bit is cleared and the |
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