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PC87570-ICC/VUL 数据表(PDF) 59 Page - National Semiconductor (TI) |
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PC87570-ICC/VUL 数据表(HTML) 59 Page - National Semiconductor (TI) |
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59 / 168 page ![]() Host Bus Interface (HBI) 59 http://www.national.com may load it with an address and lock it against any fur- ther writes. This guarantees that the address does not change due to a software bug. The initiation key contains a series of 32 values. The first 30 values match 30 values that the LFSR Register generates, starting from 6Ah. To avoid conflict with oth- er devices that use PnP ISA Specification 1.0a, the last two values must be 00h. The values in the initiation key, in hexadecimal notation, reading from left to right and top to bottom, must be: 6A, B5, DA, ED, F6, FB, 7D, BE, DF, 6F, 37, 1B, 0D, 86, C3, 61, B0, 58, 2C, 16, 8B, 45, A2, D1, E8, 74, 3A, 9D, CE, E7, 00, 00. If the sequence is successfully completed, the PC87570 enables the configuration base address update. If any of the write operations in this sequence do not match, the enable process is stopped and the hardware resets the LFSR Register to its initial value (step 1). The following two write operations define the FFD Configu- ration Register Base Address, SBAH and SBAL, in that order. Shift Direction 1 Shift Clock Preset Control Preset Value = 6Ah Key Output Figure 5-6. Initiation Key Generation (LFSR) 2 3 4 5 6 7 0 I/O Write Reset or Error Detection Reset Wait for key Is this the first value of the key? Save the address Wait for the next value of the key Is this the next value in the key? Is this the last value in the key? SBAH update mode Update SBAH with the data SBAL update mode Update SBAL with the data Index and Data Registers are accessible Reset signal inactive I/O write to the saved I/O write to the saved I/O write to the saved Any End No Any other I/O No transaction Any other I/O transaction Any other I/O transaction Yes No Yes Yes other I/O transaction Figure 5-7. Initialization Sequence address address address I/O Write to 0279h, 03F0h or 03BDh |
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