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PC87570-ICC/VUL 数据表(PDF) 60 Page - National Semiconductor (TI) |
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PC87570-ICC/VUL 数据表(HTML) 60 Page - National Semiconductor (TI) |
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60 / 168 page ![]() Host Bus Interface (HBI) 60 http://www.national.com 3. Perform two write operations with data 00h to the same address (as used in steps 2 and 3) to reset any other de- vice that may have been accidentally enabled by the ad- dress write operations. Software can now access the configuration Index and Data Registers, for setting the PC87570 interface according to the system configura- tion. Once the initial setting of the configuration registers is suc- cessfully completed, it cannot be set again until reset is ap- plied. Figure 5-7 illustrates the flow of the PnP protocol described above. Two addresses of the host bus I/O address space are used to access the configuration registers. These addresses hold the Configuration Index and the Configuration Data Regis- ter pair. The address of these registers is defined by the SBAH and SBAL Registers. The configuration Index Register points to the configuration register that is read, or written, by a read or write operation from/to the Data Register, respectively. 5.13.2 Operation Guidelines Changing Data One write operation is required to change the contents of a configuration register.Use one of the following procedures for changing data in the configuration registers. Modify Only 1. Write to the Index Register the index of the configuration register you want to change. For example, write 56h if you want to modify the FER Register. 2. Write the new data for the configuration register to the configuration Data Register. Read, Modify, Write 1. Write to the Index Register the index of the configuration register you want to change. For example, write 56h if you want to modify the FER Register. 2. Read the contents of that configuration register from the Data Register. 3. Write the modified data for the configuration register to the Data Register. Reserved Bits To maintain compatibility with future chips, the host soft- ware should avoid modification of reserved bits whenever the register is written. You can use a read-modify-write se- quence to preserve the value of reserved bits. Conflict Notice When setting the addresses of different devices, ensure that no two devices are configured to the same address. Configuring two devices (or a device and the configuration Index/Data registers) to the same address may have unpre- dictable results. Changing the Configuration Base Address This scheme allows the host to change the location of the SBAH and SBAL Registers. This protocol may be per- formed whenever access to the configuration registers is enabled; i.e., after it was first set using the PnP protocol and if SBALK in the FLR Register is 0. The address used should meet the following criteria: q The address loaded into SBAH and SBAL should al- ways be an even address (i.e., SBAL.0=0, data written to it is ignored). q The address points to the configuration Index Register, and the configuration Data Register is at the next con- secutive address. When changing the base address, the host should perform two data write operations as described in “Changing Data” on page 60. The data writes should be as follows: 1. Update the eight high bits of the configuration Index Register’s base address, by writing to SBAH. This updates an internal temporary register. SBAH is not yet updated. Reading SBAH at this point returns the data it contained before the write. The addresses of the Index and Data registers have not yet changed. 2. Update the eight lower bits of the configuration Index Register’s base address, by writing to SBAL. This write operation updates both the SBAH and SBAL registers with the data stored in the temporary register and the currently written data, respectively. The addresses of the configuration Index and Data Reg- isters are now changed. When required, this process may be repeated. |
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