PC87570-ICCSLASHVUL datasheet(75/168 Pages) NSC

75 / 168 page

Real-Time Clock (RTC) and Advanced Power Control (APC)

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Table 6-8. Bank 1 Register Memory Map

Table 6-9. Bank 2 Register Memory Map

Offset

Format

Value

Type

Function

BCD

Binary

Power-On

Reset

00h-

3Fh

All banks share the ﬁrst

14 RTC registers and

the ﬁrst 50 RTC RAM

bytes.

40h-

47h

Reserved. Writes have

no effect and reads

return 00h

48h

Century

00-99

00-63

00h

R/W

49h-

4Fh

Reserved

50h

Upper RAM

Address Port

R/W

Bits 6-0: Address of the

upper 128 RAM bytes

Bit 7: Reserved

51h-

52h

Reserved

53h

Upper RAM

Data Port

R/W

Accesses the byte

pointed by the Upper

RAM Address Port

54h-

7Fh

Reserved

Offset

Format

Value

Type

Function

BCD

Binary

Power-On

Reset

00h -

3Fh

All banks share the ﬁrst

14 RTC registers and

the ﬁrst 50 RTC RAM

bytes.

40h

APCR1

00h

R/W

See Section 6.6.1

41h

APCR2

00h

R/W

See Section 6.6.2

42h

APSR

x1000001b

Read

only

See Section 6.6.3

43h

Wake-up

Day of Week

01-07

R/W

Sunday = 1

44h

Wake-up

Date of Month

01-31

01-1F

R/W

45h

Wake-up Month

01-12

01-0C

R/W

46h

Wake-up Year

00-99

00-63

R/W

47h

RAM Lock

00h initialized

also on warm

reset and when

SIBST1.RTCMR=1

R/W

48h

Wake-up

Century

00-99

00-63

R/W

49h-

7Fh

Reserved

PC87570-ICC/VUL 数据表(PDF) 75 Page - National Semiconductor (TI)

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PC87570-ICC/VUL 数据表(PDF) 75 Page - National Semiconductor (TI)

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