PC87570-ICCSLASHVUL datasheet(64/168 Pages) NSC

64 / 168 page

Real-Time Clock (RTC) and Advanced Power Control (APC)

www.national.com

6.0

Real-Time Clock (RTC) and

Advanced Power Control (APC)

The RTC and APC module provides timekeeping and cal-

endar management capabilities, enhanced with power-sav-

ing features.

The RTC uses a 32.768 KHz signal as the basic clock for

timekeeping. It also includes 242 bytes of battery-backed

RAM for general-purpose use.

The APC enables you to keep the PC in standby mode and

start it from a remote modem or at a pre-determined time

and date.

6.1

FEATURES

The RTC provides the following functions:

Accurate timekeeping and calendar management

Alarm at a predetermined time and/or date

Three programmable interrupt sources

Valid timekeeping during power-down, by utilizing ex-

ternal battery backup

242 bytes of battery-backed RAM

RAM lock schemes to protect its content

Internal oscillator circuit (the crystal itself is off-chip),

or external clock supply for the 32.768KHz clock

A century counter

PnP support

— Relocatable index and data registers

— Module enable/disable option

— Host interrupt (IRQ8), enable/disable option

Additional low-power features such as:

— Automatic switching from battery to VCC

— Internal power monitoring on the VRT bit

— Oscillator disabling to save battery during storage

Software compatible with the DS1287 and MC146818

Access from both the host and the CompactRISC

CR16A core

The APC enables automatic system power control in re-

sponse to external or internal events, enhancing the exist-

ing power management capability of the host system. This

enables efficient use of the PC in applications such as an-

swering machines or faxes, which are typically powered up

without this feature.

6.2

RTC FUNCTIONAL DESCRIPTION

6.2.1

Host Bus Interface

A pair of Index and Data Registers is used to access all the

internal registers of all RTC banks. These two registers are

always located at consecutive addresses. The Index Regis-

ter holds the address offset of the RTC register that is read

or written through the Data Register. After power-on reset

or warm reset (see HMR pin description) when accessing

them from the host interface bus, the Index Register is lo-

cated at 0070h, and the Data register at 0071h.

The RTC registers are selected by an internal HRTCCS

chip select signal. The location of the Index Register can be

changed by reprogramming the RTCCSAH and RTCCSAL

8-bit registers. These two registers define the 16-bit full ad-

dress of the Index Register only. See also Host Configura-

tion Registers in Section 5.14 on page 61. The Data

These locations may be reassigned, in compliance with

PnP requirements.

6.2.2

Core Bus Interface

The Index and Data Registers can also be accessed by the

CR16A core, which increases the performance of the

PC87570 firmware. Through these two registers, the core

can access all the RTC registers and the CMOS RAM. Ded-

icated hardware prevents conflict when both the host and

the PC87570 firmware access the RTC. For more details,

see CR16A Core Access to RTC in Section 5.3 on page 49.

6.2.3

Bank Description

The RTC registers are mapped into the following banks:

• Bank 0

The first 14 locations contain RTC timekeeping legacy

registers. The next 50 locations contain the legacy

CMOS RAM memory. These 64 locations are accessi-

ble from all three banks.

The next 64 locations contain additional CMOS RAM

memory, accessible only from Bank 0.

• Bank 1

The first 64 locations are the same as in Bank 0.

— The Century Counter is located at 0048h,

— A pair of registers that creates a second-level ac-

cessing scheme is located at 0050h and 0053h. This

allows for an additional 28 bytes of CMOS RAM ex-

pansion.

• Bank 2

The first 64 locations are the same as in Bank 0. The re-

maining locations contain the registers implementing

the APC features.

See Section 6.7 on page 74 for a detailed description of the

memory map.

6.2.4

Bank Accessing

The banks are selected by writing the desired values to

Control Register A (CRA), bits 6-4 (DV2-0). This register is

located at offset 0Ah and is accessible from all banks.

Note: The CRA Register cannot be modiﬁed if the VRT

bit in the Control Register D (CRD) is 0. In this

case, you cannot switch banks. See also VRT bit

description in Section 6.3.4 on page 71.

6.2.5

RTC Clock Generation

The RTC uses a 32.768 KHz clock signal as the basic clock

for timekeeping. This clock signal is also the reference clock

for the APC and for the on-chip clock multiplier. See also

Chapter 7. The 32.768 KHz clock can be supplied by the in-

ternal oscillator circuit, or by an external oscillator (see Sec-

tions 6.2.6 and 6.2.7).

PC87570-ICC/VUL 数据表(PDF) 64 Page - National Semiconductor (TI)

PC87570-ICC/VUL 数据表(HTML) 64 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载