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PC87570-ICC/VUL 数据表(PDF) 79 Page - National Semiconductor (TI) |
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PC87570-ICC/VUL 数据表(HTML) 79 Page - National Semiconductor (TI) |
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79 / 168 page ![]() Power Mode Control (PMC) 79 www.national.com 8.0 Power Mode Control (PMC) The PMC improves the efficiency of PC87570 operation by adjusting its power consumption to the level of performance the application requires. 8.1 FEATURES • Three power modes: — Active — Idle — Power Off • Power mode switch, software and/or hardware controlled • High Frequency Clock Generator (HFCG) enable/dis- able control 8.2 THE POWER MODES Table 8-1 summarizes the main properties of the three modes. Table 8-1. Power Mode Summary Active Mode In Active mode, the PC87570 operates at the frequency generated by the HFCG. You can reduce power consump- tion in this mode by selectively disabling modules with their respective Enable/Disable bits or when executing a WAIT instruction while IDLE or EIM (bits 2 and 5) in the PMCR Register are cleared. When WAIT is executed, the core stops executing new instructions until it receives an inter- rupt signal. After reset, the PC87570 is in Active mode. Idle Mode In Idle mode, the clock is stopped for most of the PC87570. Only the PMC and a limited number of other modules con- tinue to operate at the 32.768 KHz clock rate; they can wake-up the PC87570 and resume instruction execution when required. Details of module activity in Idle mode are included in the relevant chapters for each module. Power Off Mode When power is turned off, the PC87570 reaches its lowest activity level. The content of the memories and registers is not preserved in this mode. A battery supply pin (VBAT) provides power to the RTC, al- lowing it to continue functioning even in Power Off mode. Refer to Chapter 6 for the RTC features supported by bat- tery backup. 1. With respect to the DHF bit in the Power Mode Control Register (PMCR) 2. Supports certain RTC features 8.3 SWITCHING BETWEEN POWER MODES Switching from one mode to another is accomplished by us- ing the protocols described below. Figure 8-1 depicts the transitions between the power modes when the EIM bit of the PMCR Register is set. 8.3.1 Decreasing Power Consumption Enter Idle mode by setting the EIM and IDLE bits of the PMCR Register, and then executing the WAIT instruction. To further reduce power consumption, you can disable the HFCG by setting the DHF bit of the PMCR Register before executing the WAIT instruction. Enter Power Off mode by turning off the power to the VCC pins of the PC87570. The PFAIL input, which is the non-maskable interrupt (NMI) source, may be used to interrupt the PC87570 to complete content saving to a non-volatile memory and to stop write operations to the RTC, before power to the PC87570 is dis- connected. 8.3.2 Increasing Performance Wake-Up from Idle mode to Active is a hardware wake- up event that causes the PC87570 to switch directly from Idle mode to Active mode. The core resumes operation by executing an interrupt routine. A wake-up event may have one of three sources: q A maskable event (from MIWU) q An NMI q An ISE interrupt in Dev environment only. The wake-up is identified by a high level on the maskable event, and a high to low transition on the NMI or ISE interrupts. Once a wake-up event is detected, it is latched until an inter- rupt acknowledge bus cycle is detected, or reset is applied. One exception is the wake-up on host transaction, which caus- es the core to continue executing the WAIT instruction until an interrupt occurs. Waking up to Active mode clears the IDLE bit of the PMCSR Register. Exit from Power Off and resume activity in Active mode by applying power to the PC87570 (VCC). The power-up reset sequence described in Section 2.3 on page 26 is used. Mode HFCG CLK Power Active On On On Idle On or Off1 Off On Power Off Off Off Battery backup only2 |
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