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TNETV2664FIBZWT 数据表(PDF) 112 Page - Texas Instruments |
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TNETV2664FIBZWT 数据表(HTML) 112 Page - Texas Instruments |
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112 / 249 page  TMS320C6424 SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 www.ti.com To understand pin multiplexing in the EMIFA Block, see Section 3.7.3.13.1, EMIFA Block Major Configuration Choices to determine the major configuration choices (A,B,C,D,E,F,G,H,J, or K). Section 3.7.3.13.2, EMIFA Block Pin-By-Pin Multiplexing Summary, provides a pin-by-pin muxing summary for the EMIFA Block. For more information on the PINMUX0 and PINMUX1 registers, see Section 3.7.2, Pin Muxing Selection After Reset. 3.7.3.13.1 EMIFA Block Major Configuration Choices Table 3-40 shows the major configuration choices in the EMIFA Block. Use this table to determine all of the PINMUX settings for the EMIFA Block: AEM, PCIEN, RMII, CS5SEL, CS4SEL, and CS3SEL. 112 Device Configurations Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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