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AD9546/PCBZ 数据表(PDF) 53 Page - Analog Devices |
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AD9546/PCBZ 数据表(HTML) 53 Page - Analog Devices |
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53 / 205 page  Data Sheet AD9546 Rev. 0 | Page 53 of 205 COMMON CLOCK DPLL TARGET PERIOD LOCK DETECTOR STATUS COMMON CLOCK REFERENCE MONITOR CNTL LOCK TDC TIME STAMPS STATUS REGISTERS R R NUM/DEN PHYSICAL CLOCK CONVERTER TIME STAMPS COMMON TIME SCALE COMMON CLOCK SYNC PRIMARY SOURCE REFx PINS Mx PINS SYNC REGISTERS REGISTERS REGISTERS GUARD CONTROLS SKEW ASSIGNED TIME SLEW LIMIT OFFSET REGISTERS REGISTERS OFFSET IUTS TIME TIME STAMPS OFFSET UTS TIME REGISTERS REGISTERS LOCAL TIME SCALE REF FREQ REGISTERS LOOP BW COMMON CLOCK DPLL USER TIME STAMPER INVERSE USER TIME STAMPER COMMON CLOCK SYNCHRONIZER COMMON TIME SCALE REFERENCE TIME SECONDARY SOURCE PHYSICAL CLOCK GENERATOR DPLL CHANNEL DRIVERS OUTxy PINS OUTxy PINS LOCAL TIME SCALE COMMON TIME SCALE LOCAL TIME SCALE CF3 CORRECTION FACTOR DIGCLK TDC TIME SCALE SYSTEM CLOCK PLL XOA XOB SYSTEM CLOCK SYSCLK (~2.4GHz) DIGCLK (SYSCLK/3) TIMING CORECLK (DIGCLK/32) TDC TIME SCALE CORECLK CORECLK REGISTERS TIME STAMPS STATUS R NUM/DEN REGISTERS TARGET PERIOD COMMON CLOCK REFERENCE MONITOR REGISTERS REGISTERS TIME STAMPS TIME STAMPS TIME STAMPS ÷R TIME STAMPS TDC ÷R REGISTERS R NOTES 1. DIGCLK IS DIGITAL CLOCK. 2. NUM/DEN ARE NUMERATOR/DENOMINATOR. Figure 48. Digitized Clock Components |
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