 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
AD9546/PCBZ 数据表(PDF) 10 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9546/PCBZ 数据表(HTML) 10 Page - Analog Devices |
|
|
10 / 205 page  AD9546 Data Sheet Rev. 0 | Page 10 of 205 REFERENCE INPUTS Table 6. Parameter Min Typ Max Unit Test Conditions/Comments DIFFERENTIAL MODE Differential mode specifications assume ac coupling of the input signal to the reference input pins Frequency Range Sinusoidal Input 750 MHz Lower limit dependent on input slew rate Low Voltage Positive Emitter Coupled Logic (LVPECL) Input 1 750 × 106 Hz Lower limit dependent on ac coupling LVDS Input 1 500 × 106 Hz Assumes an LVDS minimum of 494 mV p-p differential amplitude; lower limit dependent on ac coupling Slew Rate >4.1 V/µs Required for proper reference monitor operation; output jitter degradation can occur for slew rates < 35 V/µs Common-Mode Input Voltage 0.64 V Internally generated self bias voltage Differential Input Amplitude Peak-to-peak differential voltage swing across pins required to ensure switching between logic levels as measured with a differential probe; instantaneous voltage on either pin must not exceed 1.3 V fIN < 500 MHz 350 2100 mV p-p fIN = 500 MHz to 750 MHz 500 2100 mV p-p Differential Input Voltage Hysteresis 55 100 mV Input Resistance 16 kΩ Equivalent differential input resistance Input Pulse Width LVPECL 600 ps LVDS 900 ps DC-COUPLED, LVDS-COMPATIBLE MODE Applies for dc coupling to an LVDS source Frequency Range 1 450 × 106 Hz Slew Rate >1.2 V/µs Required for proper reference monitor operation; output jitter degradation can occur for slew rates < 35 V/µs Common-Mode Input Voltage 1.125 1.375 V Differential Input Amplitude 400 1200 mV p-p Differential voltage across pins required to ensure switching between logic levels; instantaneous voltage on either pin must not exceed the supply rails Differential Input Voltage Hysteresis 55 100 mV Input Resistance 16 kΩ Input Pulse Width 1 ns SINGLE-ENDED MODE Single-ended mode specifications assume dc coupling of the input signal to the reference input pins 1.2 V CMOS Frequency Range 1 500 × 106 Hz Assumes dc-coupled input signal to the reference input pins Input Voltage High, VIH 0.78 1.38 V Low, VIL 0.42 V Input Resistance 30 kΩ Slew Rate >8 V/µs Required for proper reference monitor operation; output jitter degradation can occur for slew rates < 35 V/µs Input Pulse Width 900 ps 1.8 V CMOS Frequency Range 1 500 × 106 Hz Assumes dc-coupled input signal to the reference input pins |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
