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AD9546/PCBZ 数据表(PDF) 6 Page - Analog Devices

部件名 AD9546/PCBZ
功能描述  Dual DPLL Digitized Clock Synchronizer
PDF  205 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9546/PCBZ 数据表(HTML) 6 Page - Analog Devices

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AD9546
Data Sheet
Rev. 0 | Page 6 of 205
FUNCTIONAL BLOCK DIAGRAM
SYSTEM
CLOCK PLL
STATUS AND
CONTROL PINS
AD9546
TEMPERATURE
SENSOR
SYSTEM CLOCK
COMPENSATION
REFERENCE
SWITCHING
CONTROL
SERIAL PORT
REFERENCE
MONITORS
REFA
REFAA
REFB
REFBB
REFERENCE
INPUTS (4)
NCO
DPLL
DPLL0
PLL
APLL0
VCO
PLL0
DISTRIBUTION
OUTPUTS
DISTRIBUTION
OUTPUTS
EEPROM
(OPTIONAL)
SYSTEM
CLOCK
DIGITAL
CROSS
POINT
MUX
SERIAL PORT (SPI/I2C)
AND EEPROM
CONTROLLER
M0 TO M6
APLL VCO FREQUENCY RANGE
APLL0: 2424MHz TO 3232MHz
APLL1: 3232MHz TO 4040MHz
TDC
AUXILIARY
REFERENCE (4)
AUXILIARY
NCO’S (2)
COMMON CLOCK
SYNCHRONIZER
INVERSE USER
TIME STAMP (2)
USER TIME
STAMP (9)
INTERNAL ZERO DELAY
÷R
TDC
÷R
÷2
÷Q
OUT0AP/N
OUT0BP/N
OUT0CP/N
OUT1AP/N
OUT1BP/N
XOA/
XOB
÷Q
÷2
NCO
DPLL
DPLL1
PLL
APLL1
VCO
PLL1
Figure 1.



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