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AD9546/PCBZ 数据表(PDF) 99 Page - Analog Devices |
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AD9546/PCBZ 数据表(HTML) 99 Page - Analog Devices |
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99 / 205 page  Data Sheet AD9546 Rev. 0 | Page 99 of 205 For example, determine the value necessary to yield a 14% pulse width given E = 7301. Solving Equation 2 for Phase Offset yields the following: Phase Offset = Pulse Width × E/100 = 14 × 7301/100 = 1022 (nearest integer) = 0x 0 0000 03FE (hexadecimal) The user has the option to adjust the output pulse width only prior to execution of the first subsequent phase offset. After invoking a subsequent phase offset, pulse width control is no longer available. To change the output pulse width after executing the first subsequent phase offset, the user must issue a Q divider synchronization (see the Distribution Output Clock Synchronization section), at which point the Q divider is ready to accept a new initial phase offset, a new output pulse width, and subsequent phase offsets. |
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