AD9546SLASHPCBZ datasheet(82/205 Pages) AD

82 / 205 page

AD9546

Data Sheet

Rev. 0 | Page 82 of 205

REFERENCE MONITOR BASE PERIOD

The reference monitor operates directly on TDC time stamps,

which occur with each rising edge from the output of the

R divider. Because time stamps result from rising edges at the

TDC input, which occur at intervals of the input reference

period multiplied by R (the reference divider ratio), the base

period (tBASE) of the reference monitor is R times the reference

period.

REFERENCE MONITOR STATUS INDICATORS

The reference monitor associated with each reference provides

six status indicators: valid, fault, LOS, slow, fast, and excess

jitter. These indicators are associated with the D4, D3, D5, D0,

D1, and D2 bits, respectively, but the register address depends

on the reference per Table 50.

Table 50. Reference Monitor Status Register Address

Reference Input

REFA

0x3005

REFAA

0x3006

REFB

0x3007

REFBB

0x3008

Auxiliary REF0

0x301F

Auxiliary REF1

0x3020

Auxiliary REF2

0x3021

Auxiliary REF3

0x3022

Valid

The valid status indicator is Logic 1 at the expiration of the

optional validation time (see the Reference Validation section).

Fault

The fault status indicator is Logic 1 when the LOS, slow, fast, or

excess jitter status is true.

Loss of Signal (LOS)

The LOS status indicator is Logic 1 if the reference monitor

determines the input signal is absent, very slow (>1.15 × tBASE)

or a phase discontinuity occurred (see the Discontinuity

Detection section).

Slow

The slow status indicator is Logic 1 if the period of the input

signal is greater than the maximum period prescribed by the

threshold setting (see the Reference Period Threshold section).

Fast

The fast status indicator is Logic 1 if the period of the input

signal is less than the minimum period prescribed by the

threshold setting (see the Reference Period Threshold section).

Excess Jitter

The excess jitter status indicator is Logic 1 if the reference

monitor determines the input signal jitter exceeds the limits

specified by jitter tolerance (see the Jitter Tolerance section) or

a phase discontinuity occurred (see the Discontinuity Detection

section).

REFERENCE MONITOR CONTROLS

The reference monitor requires certain advance information to

function properly. The user provides this information by

programming the appropriate parameters as described in the

Reference Period (tREF), Reference Period Threshold, Hysteresis,

Jitter Tolerance, Validation Time (tVALID), Timeout, Bypass, and

Invalidate sections.

Reference Period (tREF)

Each reference input has a dedicated unsigned 60-bit bit field in

the register address ranges shown in Table 51 for specifying

tREF. tREF constitutes the nominal period of the associated input

reference and represents time in units of attoseconds (10−18 sec)

with an upper limit of ~1.15 sec.

For example, given the REFAA input has a nominal 2.048 MHz

input signal. The corresponding period is 1/(2.048 × 106) sec,

which, when multiplied by 1018, yields 488,281,250,000

attoseconds. Program Register 0x042B to Register 0x0424 with

the 60-bit value corresponding to 488,281,250,000 attoseconds

(0x 000 0071 AFD4 98D0 hexadecimal).

Table 51. Nominal Period Address Ranges

Reference Input

REFA

0x0404 to 0x040B

REFAA

0x0424 to 0x042B

REFB

0x0444 to 0x044B

REFBB

0x0464 to 0x046B

Auxiliary REF0

0x0484 to 0x048B

Auxiliary REF1

0x04A4 to 0x04AB

Auxiliary REF2

0x04C4 to 0x04CB

Auxiliary REF3

0x04E4 to 0x04EB

Reference Period Threshold

The reference period threshold is the maximum relative

deviation from tREF the reference monitor uses to declare a

nonfaulted reference as out of tolerance (that is, slow or fast).

To specify the threshold parameter, each reference input has a

dedicated register group comprising an unsigned 24-bit integer

per the register address ranges shown in Table 52. The 24-bit

number represents fractional units of parts per billion (ppb) up

to a maximum of approximately 17 million ppb (1.7%), with

the default setting yielding 100 ppm.

Table 52. Offset Limit Address Ranges

Reference Input

REFA

0x040C to 0x040E

REFAA

0x042C to 0x042E

REFB

0x044C to 0x044E

REFBB

0x046C to 0x046E

Auxiliary REF0

0x048C to 0x048E

Auxiliary REF1

0x04AC to 0x04AE

Auxiliary REF2

0x04CC to 0x04CE

Auxiliary REF3

0x04EC to 0x04EE

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