HC705JJ7GRSSLASHD datasheet(173/230 Pages) NXP

部件名	HC705JJ7GRS/D

功能描述	Low-Cost, HC05 Core MCU in 20-Pin Package (MC68HC705JJ7) or 28-Pin Package (MC68HC705JP7)

PDF	230 Pages

Scroll/Zoom	100%

制造商	NXP [NXP Semiconductors]

网页	http://www.nxp.com

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173 / 230 page

Personality EPROM

PEPROM Registers

MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0

General Release Specification

Personality EPROM

12.3 PEPROM Registers

Two I/O registers control programming and reading of the PEPROM:

•

The PEPROM bit select register (PEBSR)

•

The PEPROM status and control register (PESCR)

12.3.1 PEPROM Bit Select Register (PEBSR)

The PEPROM bit select register (PEBSR) selects one of 64 bits in the

PEPROM array. Reset clears all the bits in the PEPROM bit select

PEB7 and PEB6 — Not connected to the PEPROM array

These read/write bits are available as storage locations. Reset clears

PEB7 and PEB6.

PEB5–PEB0 — PEPROM Bit Select Bits

These read/write bits select one of 64 bits in the PEPROM as shown

in Table 12-1. Bits PEB2–0 select the PEPROM row, and bits

PEB5–PEB3 select the PEPROM column. Reset clears PEB5–PEB0,

selecting the PEPROM bit in row zero, column zero.

$000E

Bit 7

654321

Bit 0

Read:

PEB7

PEB6

PEB5

PEB4

PEB3

PEB2

PEB1

PEB0

Write:

Reset:

00000000

Figure 12-2. PEPROM Bit Select Register (PEBSR)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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