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H8SX1663 数据表(PDF) 48 Page - Renesas Technology Corp

部件名 H8SX1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX1663 数据表(HTML) 48 Page - Renesas Technology Corp

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Rev.1.00 Jun. 07, 2006 Page xlviii of lii
Table 10.8
TPSC2 to TPSC0 (Channel 2) .............................................................................. 507
Table 10.9
TPSC2 to TPSC0 (Channel 3) .............................................................................. 507
Table 10.10
TPSC2 to TPSC0 (Channel 4) .......................................................................... 508
Table 10.11
TPSC2 to TPSC0 (Channel 5) .......................................................................... 508
Table 10.12
MD3 to MD0 .................................................................................................... 510
Table 10.13
TIORH_0 .......................................................................................................... 512
Table 10.14
TIORL_0........................................................................................................... 513
Table 10.15
TIOR_1............................................................................................................. 514
Table 10.16
TIOR_2............................................................................................................. 515
Table 10.17
TIORH_3 .......................................................................................................... 516
Table 10.18
TIORL_3........................................................................................................... 517
Table 10.19
TIOR_4............................................................................................................. 518
Table 10.20
TIOR_5............................................................................................................. 519
Table 10.21
TIORH_0 .......................................................................................................... 520
Table 10.22
TIORL_0........................................................................................................... 521
Table 10.23
TIOR_1............................................................................................................. 522
Table 10.24
TIOR_2............................................................................................................. 523
Table 10.25
TIORH_3 .......................................................................................................... 524
Table 10.26
TIORL_3........................................................................................................... 525
Table 10.27
TIOR_4............................................................................................................. 526
Table 10.28
TIOR_5............................................................................................................. 527
Table 10.29
Register Combinations in Buffer Operation ..................................................... 545
Table 10.30
Cascaded Combinations.................................................................................... 549
Table 10.31
PWM Output Registers and Output Pins .......................................................... 552
Table 10.32
Clock Input Pins in Phase Counting Mode ....................................................... 556
Table 10.33
Up/Down-Count Conditions in Phase Counting Mode 1.................................. 558
Table 10.34
Up/Down-Count Conditions in Phase Counting Mode 2.................................. 559
Table 10.35
Up/Down-Count Conditions in Phase Counting Mode 3.................................. 560
Table 10.36
Up/Down-Count Conditions in Phase Counting Mode 4.................................. 561
Table 10.37
TPU Interrupts .................................................................................................. 563
Section 11 Programmable Pulse Generator (PPG)
Table 11.1
Pin Configuration.................................................................................................. 584
Section 12 8-Bit Timers (TMR)
Table 12.1
Pin Configuration.................................................................................................. 610
Table 12.2
Clock Input to TCNT and Count Condition (Units 0 and 1)................................. 617
Table 12.3
Clock Input to TCNT and Count Condition (Units 2 and 3)................................. 618
Table 12.4
8-Bit Timer (TMR_0 or TMR_1) Interrupt Sources (in Unit 0 and Unit 1) ......... 629
Table 12.5
8-Bit Timer (TMR_4 or TMR_5) Interrupt Sources (in Unit 2 and Unit 3) ......... 630
Table 12.6
Timer Output Priorities......................................................................................... 633



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