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H8SX1663 数据表(PDF) 66 Page - Renesas Technology Corp

部件名 H8SX1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX1663 数据表(HTML) 66 Page - Renesas Technology Corp

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Section 1 Overview
Rev.1.00 Jun. 07, 2006 Page 14 of 1102
REJ09B0294-0100
Classification
Abbreviation
Pin No.
(FP-144LV)
I/O
Description
16-bit timer
pulse unit
(TPU)
TCLKA-A/TCLKA-B
TCLKB-A/TCLKB-B
TCLKC-A/TCLKC-B
TCLKD-A/TCLKD-B
58/93
62/94
104/100
106/101
Input/
output
Input pins for the external clocks.
TIOCA0
TIOCB0
TIOCC0
TIOCD0
56, 57
57
58, 62
62
Input/
output
Signals for TGRA0 to TGRD0. These are used
for the input capture inputs/output compare
outputs/PWM outputs.
TIOCA1
TIOCB1
63, 104
104
Input/
output
Signals for TGRA_1 and TGRB_1. These are
used for the input capture inputs/output
compare outputs/PWM outputs.
TIOCA2
TIOCB2
105, 106
106
Input/
output
Signals for TGRA_2 and TGRB_2. These are
used for the input capture inputs/output
compare outputs/PWM outputs.
TIOCA3
TIOCB3
TIOCC3
TIOCD3
49, 51
49
52, 53
53
Input/
output
Signals for TGRA_3 and TGRB_3. These are
used for the input capture inputs/output
compare outputs/PWM outputs.
TIOCA4
TIOCB4
54, 55
54
Input/
output
Signals for TGRA_4 and TGRB_4. These are
used for the input capture inputs/output
compare outputs/PWM outputs.
TIOCA5
TIOCB5
59, 60
60
Input/
output
Signals for TGRA_5 and TGRB_5. These are
used for the input capture inputs/output
compare outputs/PWM outputs.
Programmable
pulse generator
(PPG)
PO15
PO14
PO13
PO12
PO11
PO10
PO9
PO8
PO7
PO6
PO5
PO4
PO3
PO2
PO1
PO0
106
105
104
63
62
58
57
56
60
59
55
54
53
52
51
49
Output Output pins for the pulse signals.



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