H8SX1663 datasheet(77/1158 Pages) RENESAS

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Section 2 CPU

Rev.1.00 Jun. 07, 2006 Page 25 of 1102

REJ09B0294-0100

2.2.2

Middle Mode

The program area in middle mode is extended to 16 Mbytes as compared with that in normal

mode.

• Address Space

The maximum address space of 16 Mbytes can be accessed as a total of the program and data

areas. For individual areas, up to 16 Mbytes of the program area or up to 64 kbytes of the data

area can be allocated.

• Extended Registers (En)

The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit

segments of 32-bit registers. When the extended register En is used as a 16-bit register (in

other than the JMP and JSR instructions), it can contain any value even when the

corresponding general register Rn is used as an address register. (If the general register Rn is

referenced in the register indirect addressing mode with pre-/post-increment or pre-/post-

decrement and a carry or borrow occurs, however, the value in the corresponding extended

• Instruction Set

All instructions and addressing modes can be used. Only the lower 16 bits of effective

addresses (EA) are valid and the upper eight bits are sign-extended.

• Exception Vector Table and Memory Indirect Branch Addresses

In middle mode, the top area starting at H'000000 is allocated to the exception vector table.

One branch address is stored per 32 bits. The upper eight bits are ignored and the lower 24 bits

are stored. The structure of the exception vector table is shown in figure 2.4.

The memory indirect (@@aa:8) and extended memory indirect (@@vec:7) addressing modes

are used in the JMP and JSR instructions. An 8-bit absolute address included in the instruction

code specifies a memory location. Execution branches to the contents of the memory location.

In middle mode, an operand is a 32-bit (longword) operand, providing a 32-bit branch address.

The upper eight bits are reserved and assumed to be H'00.

• Stack Structure

The stack structure of PC at a subroutine branch and that of PC and CCR at an exception

handling are shown in figure 2.5. The PC contents are saved or restored in 24-bit units.

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