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H8SX1663 数据表(PDF) 23 Page - Renesas Technology Corp

部件名 H8SX1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX1663 数据表(HTML) 23 Page - Renesas Technology Corp

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Rev.1.00 Jun. 07, 2006 Page xxiii of lii
16.3.5 Interrupt Select Register 1 (ISR1)......................................................................... 760
16.3.6 Interrupt Select Register 2 (ISR2)......................................................................... 761
16.3.7 Interrupt Enable Register 0 (IER0) ....................................................................... 762
16.3.8 Interrupt Enable Register 1 (IER1) ....................................................................... 763
16.3.9 Interrupt Enable Register 2 (IER2) ....................................................................... 763
16.3.10 EP0i Data Register (EPDR0i) ............................................................................... 764
16.3.11 EP0o Data Register (EPDR0o) ............................................................................. 765
16.3.12 EP0s Data Register (EPDR0s) .............................................................................. 765
16.3.13 EP1 Data Register (EPDR1) ................................................................................. 766
16.3.14 EP2 Data Register (EPDR2) ................................................................................. 766
16.3.15 EP3 Data Register (EPDR3) ................................................................................. 767
16.3.16 EP0o Receive Data Size Register (EPSZ0o) ........................................................ 767
16.3.17 EP1 Receive Data Size Register (EPSZ1) ............................................................ 768
16.3.18 Trigger Register (TRG)......................................................................................... 768
16.3.19 Data Status Register (DASTS).............................................................................. 770
16.3.20 FIFO Clear Register (FCLR) ................................................................................ 771
16.3.21 DMA Transfer Setting Register (DMA) ............................................................... 772
16.3.22 Endpoint Stall Register (EPSTL).......................................................................... 775
16.3.23 Configuration Value Register (CVR) ................................................................... 776
16.3.24 Control Register (CTLR) ...................................................................................... 776
16.3.25 Endpoint Information Register (EPIR) ................................................................. 778
16.3.26 Transceiver Test Register 0 (TRNTREG0)........................................................... 782
16.3.27 Transceiver Test Register 1 (TRNTREG1)........................................................... 784
16.4
Interrupt Sources................................................................................................................ 786
16.5
Operation ........................................................................................................................... 788
16.5.1 Cable Connection.................................................................................................. 788
16.5.2 Cable Disconnection ............................................................................................. 789
16.5.3 Suspend and Resume Operations.......................................................................... 790
16.5.4 Control Transfer.................................................................................................... 795
16.5.5 EP1 Bulk-Out Transfer (Dual FIFOs)................................................................... 801
16.5.6 EP2 Bulk-In Transfer (Dual FIFOs) ..................................................................... 802
16.5.7 EP3 Interrupt-In Transfer...................................................................................... 804
16.6
Processing of USB Standard Commands and Class/Vendor Commands........................... 805
16.6.1 Processing of Commands Transmitted by Control Transfer ................................. 805
16.7
Stall Operations.................................................................................................................. 806
16.7.1 Overview............................................................................................................... 806
16.7.2 Forcible Stall by Application ................................................................................ 806
16.7.3 Automatic Stall by USB Function Module ........................................................... 808
16.8
DMA Transfer.................................................................................................................... 809
16.8.1 Overview............................................................................................................... 809



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