H8SX1663 datasheet(55/1158 Pages) RENESAS

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Section 1 Overview

Rev.1.00 Jun. 07, 2006 Page 3 of 1102

REJ09B0294-0100

1.3

Pin Assignments

1.3.1

Pin Assignments

FP-144L

(top view)

Note: *

This is an on-chip emulator enable pin. Drive this pin low for the connection in normal operating mode.

When this pin is driven high, the on-chip emulation function is enabled and pins P62, P63, P64, P65, and

WDTOVF are dedicated to the on-chip emulator. For details on a connection example with the E10A,

refer to the E10A Emulator User's Manual.

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89

PH6/D6

PH5/D5

PH4/D4

VSS

PH3/D3

PH2/D2

PH1/D1

PH0/D0

VCC

P34/PO12/TIOCA1/

TEND1-B

P33/PO11/TIOCC0/TIOCD0/TCLKB-A/

DREQ1-B

NMI

P27/PO7/TIOCA5/TIOCB5

P26/PO6/TIOCA5/TMO1/TxD1

P32/PO10/TIOCC0/TCLKA-A/

DACK0-B

P31/PO9/TIOCA0/TIOCB0/

TEND0-B

P30/PO8/TIOCA0/

DREQ0-B

P25/PO5/TIOCA4/TMCI1/RxD1

P24/PO4/TIOCA4/TIOCB4/TMRI1/SCK1

P23/PO3/TIOCC3/TIOCD3/

IRQ11-A

P22/PO2/TIOCC3/TMO0/TxD0/

IRQ10-A

P21/PO1/TIOCA3/TMCI0/RxD0/

IRQ9-A

VCC

P20/PO0/TIOCA3/TIOCB3/TMRI0/SCK0/

IRQ8-A

VSS

MD_CLK

VBUS

DrVSS

USD-

USD+

DrVCC

PM4

PM3

EMLE*

PD0/A0

PD1/A1

P62/TMO2/SCK4/

DACK2/IRQ10-B/TRST

PLLVCC

P63/TMRI3/

DREQ3/IRQ11-B/TMS

PLLVSS

P64/TMCI3/

TEND3/TDI

P65/TMO3/

DACK3/TCK

MD0

PC2/

LUCAS/DQMLU

PC3/

LLCAS/DQMLL

P50/AN0/

IRQ0-B

P51/AN1/

IRQ1-B

P52/AN2/

IRQ2-B

AVCC

P53/AN3/

IRQ3-B

AVSS

P54/AN4/

IRQ4-B

Vref

P55/AN5/

IRQ5-B

P56/AN6/DA0/

IRQ6-B

P57/AN7/DA1/

IRQ7-B

MD1

PB4/

CS4-B/WE

PB5/

OE/CKE

PB6/

CS6-D/(RD/WR-B)

MD3

PA0/

BREQO/BS-A

PA1/

BACK/(RD/WR-A)

PA2/

BREQ/WAIT

PA3/

LLWR/LLB

PA4/

LHWR/LUB

PA5/

PA6/

AS/AH/BS-B

VSS

PA7/B

VCC

PB0/

CS0/CS4-A/CS5-B

88 87 86 85 84

10111213141516 171819 20 21 22 2324 25 26 27 28 29 30 31 32 33 34 35 36

83 82 81 80 79 78 77 76 75 74 73

Figure 1.2 Pin Assignments

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