H8SX1663 datasheet(17/1158 Pages) RENESAS

17 / 1158 page

Rev.1.00 Jun. 07, 2006 Page xvii of lii

9.1.4

Input Buffer Control Register (PnICR) (n = 1, 2, 3, 5, 6, A to F, H, I, and M)..... 439

9.1.5

Pull-Up MOS Control Register (PnPCR) (n = D to F, H, and I)........................... 440

9.1.6

Open-Drain Control Register (PnODR) (n = 2 and F) .......................................... 441

9.2

Output Buffer Control........................................................................................................ 441

9.2.1

Port 1..................................................................................................................... 442

9.2.2

Port 2..................................................................................................................... 446

9.2.3

Port 3..................................................................................................................... 450

9.2.4

Port 5..................................................................................................................... 454

9.2.5

Port 6..................................................................................................................... 454

9.2.6

Port A.................................................................................................................... 457

9.2.7

Port B .................................................................................................................... 462

9.2.8

Port C .................................................................................................................... 466

9.2.9

Port D.................................................................................................................... 467

9.2.10 Port E .................................................................................................................... 467

9.2.11 Port F .................................................................................................................... 468

9.2.12 Port H.................................................................................................................... 472

9.2.13 Port I ..................................................................................................................... 473

9.2.14 Port M ................................................................................................................... 474

9.3

Port Function Controller .................................................................................................... 483

9.3.1

Port Function Control Register 0 (PFCR0) ........................................................... 483

9.3.2

Port Function Control Register 1 (PFCR1) ........................................................... 484

9.3.3

Port Function Control Register 2 (PFCR2) ........................................................... 485

9.3.4

Port Function Control Register 4 (PFCR4) ........................................................... 487

9.3.5

Port Function Control Register 6 (PFCR6) ........................................................... 489

9.3.6

Port Function Control Register 7 (PFCR7) ........................................................... 490

9.3.7

Port Function Control Register 9 (PFCR9) ........................................................... 491

9.3.8

Port Function Control Register B (PFCRB).......................................................... 493

9.3.9

Port Function Control Register C (PFCRC).......................................................... 494

9.4

Usage Notes ....................................................................................................................... 496

9.4.1

Notes on Input Buffer Control Register (ICR) Setting ......................................... 496

9.4.2

Notes on Port Function Control Register (PFCR) Settings ................................... 496

Section 10 16-Bit Timer Pulse Unit (TPU)........................................................497

10.1

Features .............................................................................................................................. 497

10.2

Input/Output Pins ............................................................................................................... 501

10.3

Register Descriptions ......................................................................................................... 502

10.3.1 Timer Control Register (TCR).............................................................................. 504

10.3.2 Timer Mode Register (TMDR) ............................................................................. 509

10.3.3 Timer I/O Control Register (TIOR) ...................................................................... 510

10.3.4 Timer Interrupt Enable Register (TIER) ............................................................... 528

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