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数据搜索系统，热门电子元器件搜索 |
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H8SX1663 数据表(PDF) 100 Page - Renesas Technology Corp |
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H8SX1663 数据表(HTML) 100 Page - Renesas Technology Corp |
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100 / 1158 page  Section 2 CPU Rev.1.00 Jun. 07, 2006 Page 48 of 1102 REJ09B0294-0100 Instruction Size Function DIVU W/L Rd ÷ Rs → Rd Performs unsigned division on data in two general registers: either 16 bits ÷ 16 bits → 16-bit quotient, or 32 bits ÷ 32 bits → 32-bit quotient. DIVXS B/W Rd ÷ Rs → Rd Performs signed division on data in two general registers: either 16 bits ÷ 8 bits → 8-bit quotient and 8-bit remainder, or 32 bits ÷ 16 bits → 16-bit quotient and 16-bit remainder. DIVS W/L Rd ÷ Rs → Rd Performs signed division on data in two general registers: either 16 bits ÷ 16 bits → 16-bit quotient, or 32 bits ÷ 32 bits → 32-bit quotient. CMP B/W/L (EAd) − #IMM, (EAd) − (EAs) Compares data between immediate data, general registers, and memory and stores the result in CCR. NEG B/W/L 0 − (EAd) → (EAd) Takes the two's complement (arithmetic complement) of data in a general register or the contents of a memory location. EXTU W/L (EAd) (zero extension) → (EAd) Performs zero-extension on the lower 8 or 16 bits of data in a general register or memory to word or longword size. The lower 8 bits to word or longword, or the lower 16 bits to longword can be zero-extended. EXTS W/L (EAd) (sign extension) → (EAd) Performs sign-extension on the lower 8 or 16 bits of data in a general register or memory to word or longword size. The lower 8 bits to word or longword, or the lower 16 bits to longword can be sign-extended. TAS B @ERd − 0, 1 → (<bit 7> of @EAd) Tests memory contents, and sets the most significant bit (bit 7) to 1. MAC — (EAs) × (EAd) + MAC → MAC Performs signed multiplication on memory contents and adds the result to MAC. CLRMAC — 0 → MAC Clears MAC to zero. LDMAC — Rs → MAC Loads data from a general register to MAC. STMAC — MAC → Rd Stores data from MAC to a general register. |
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