H8SX1663 datasheet(104/1158 Pages) RENESAS

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Section 2 CPU

Rev.1.00 Jun. 07, 2006 Page 52 of 1102

REJ09B0294-0100

Instruction

Size

Function

BISTZ

∼ Z → (<bit-No.> of <EAd>)

Transfers the inverse of the zero flag value to a specified bit in the

contents of a memory location. The bit number is specified by 3-bit

immediate data.

BFLD

(EAs) (bit field)

→ Rd

Transfers a specified bit field in memory location contents to the lower bits

of a specified general register.

BFST

→ (EAd) (bit field)

Transfers the lower bits of a specified general register to a specified bit

field in memory location contents.

Table 2.10

Branch Instructions

Instruction

Size

Function

BRA/BS

BRA/BC

Tests a specified bit in memory location contents. If the specified

condition is satisfied, execution branches to a specified address.

BSR/BS

BSR/BC

Tests a specified bit in memory location contents. If the specified

condition is satisfied, execution branches to a subroutine at a specified

address.

Bcc

—

Branches to a specified address if the specified condition is satisfied.

BRA/S

—

Branches unconditionally to a specified address after executing the next

instruction. The next instruction should be a 1-word instruction except for

the block transfer and branch instructions.

JMP

—

Branches unconditionally to a specified address.

BSR

—

Branches to a subroutine at a specified address.

JSR

—

Branches to a subroutine at a specified address.

RTS

—

Returns from a subroutine.

RTS/L

—

Returns from a subroutine, restoring data from the stack to multiple

general registers.

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