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H8SX1663 数据表(PDF) 74 Page - Renesas Technology Corp |
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H8SX1663 数据表(HTML) 74 Page - Renesas Technology Corp |
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74 / 1158 page ![]() Section 2 CPU Rev.1.00 Jun. 07, 2006 Page 22 of 1102 REJ09B0294-0100 • Two base registers Vector base register Short address base register • 4-Gbyte address space Program: 4 Gbytes Data: 4 Gbytes • High-speed operation All frequently-used instructions executed in one or two states 8/16/32-bit register-register add/subtract: 1 state 8 × 8-bit register-register multiply: 1 state 16 ÷ 8-bit register-register divide: 10 states 16 × 16-bit register-register multiply: 1 state 32 ÷ 16-bit register-register divide: 18 states 32 × 32-bit register-register multiply: 5 states 32 ÷ 32-bit register-register divide: 18 states • Four CPU operating modes Normal mode Middle mode Advanced mode Maximum mode • Power-down modes Transition is made by execution of SLEEP instruction Choice of CPU operating clocks |
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