H8SX1663 datasheet(21/1158 Pages) RENESAS

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Rev.1.00 Jun. 07, 2006 Page xxi of lii

14.6.1 Notes on Register Access...................................................................................... 649

14.6.2 Conflict between Timer Counter (TCNT) Write and Increment........................... 650

14.6.3 Changing Values of Bits CKS2 to CKS0.............................................................. 650

14.6.4 Switching between Watchdog Timer Mode and Interval Timer Mode................. 650

14.6.5 Internal Reset in Watchdog Timer Mode.............................................................. 651

14.6.6 System Reset by

WDTOVF Signal....................................................................... 651

14.6.7 Transition to Watchdog Timer Mode or Software Standby Mode........................ 651

Section 15 Serial Communication Interface (SCI, IrDA, CRC)........................653

15.1

Features .............................................................................................................................. 653

15.2

Input/Output Pins ............................................................................................................... 658

15.3

Register Descriptions ......................................................................................................... 659

15.3.1 Receive Shift Register (RSR) ............................................................................... 661

15.3.2 Receive Data Register (RDR) ............................................................................... 661

15.3.3 Transmit Data Register (TDR).............................................................................. 662

15.3.4 Transmit Shift Register (TSR) .............................................................................. 662

15.3.5 Serial Mode Register (SMR) ................................................................................ 662

15.3.6 Serial Control Register (SCR)............................................................................... 666

15.3.7 Serial Status Register (SSR) ................................................................................. 671

15.3.8 Smart Card Mode Register (SCMR) ..................................................................... 680

15.3.9 Bit Rate Register (BRR) ....................................................................................... 681

15.3.10 Serial Extended Mode Register (SEMR_2) .......................................................... 688

15.3.11 Serial Extended Mode Register 5 and 6 (SEMR_5 and SEMR_6) ....................... 690

15.3.12 IrDA Control Register (IrCR) ............................................................................... 697

15.4

Operation in Asynchronous Mode ..................................................................................... 698

15.4.1 Data Transfer Format............................................................................................ 699

15.4.2 Receive Data Sampling Timing and Reception Margin in Asynchronous Mode . 700

15.4.3 Clock..................................................................................................................... 701

15.4.4 SCI Initialization (Asynchronous Mode) .............................................................. 702

15.4.5 Serial Data Transmission (Asynchronous Mode) ................................................. 703

15.4.6 Serial Data Reception (Asynchronous Mode)....................................................... 705

15.5

Multiprocessor Communication Function.......................................................................... 709

15.5.1 Multiprocessor Serial Data Transmission ............................................................. 711

15.5.2 Multiprocessor Serial Data Reception .................................................................. 712

15.6

Operation in Clocked Synchronous Mode (SCI_0, 1, 2, and 4 only)................................. 715

15.6.1 Clock..................................................................................................................... 715

15.6.2 SCI Initialization (Clocked Synchronous Mode) (SCI_0, 1, 2, and 4 only).......... 716

15.6.3 Serial Data Transmission (Clocked Synchronous Mode)

(SCI_0, 1, 2, and 4 only)....................................................................................... 717

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