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TNETV1002IDZHK 数据表(PDF) 19 Page - Texas Instruments |
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TNETV1002IDZHK 数据表(HTML) 19 Page - Texas Instruments |
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19 / 102 page  Introduction 9 June 2001 -- Revised December 2002 SPRS180C Table 2--2. Terminal Functions (Continued) TERMINAL NAME DESCRIPTION I/O/Z† BE3/ SDRAM_DQM3 O MCU byte-enable for non-SDRAM cycles, or SDRAM byte-enable (for read) and mask (for write), active-low CS0 O MCU chip select 0, active-low CS1 O MCU chip select 1, active-low CS2 O MCU chip select 2, active-low CS3/ROMSIZE16 I/O MCU chip select 3, active-low.¶ Input sampled at RESET rising edge to determine the width of the ARM processor during initialization as defined below: 0 = 16 bits 1 = 32 bits For best results, an external pullup or pulldown should be installed to ensure proper sampling. OE O MCU output-enable for peripherals connected to the MCU memory interface (not for SDRAM), active-low WAIT I MCU wait request, active-low. If this signal is unused, it must be pulled high with an external pullup resistor. R/W O Asynchrouous memory active-high read / active-low write signal (not for SDRAM) SDRAM_CLK O SDRAM Clock SDRAM_CS O SDRAM chip-select, active-low BDX0 O/Z McBSP0 transmit serial data BFSX0 I/O/Z McBSP0 transmit frame synchronization BCLKX0 I/O/Z McBSP0 transmit clock BDR0 I McBSP0 receive serial data BCLKR0 I/O/Z McBSP0 receive clock BFSR0 I/O/Z McBSP0 receive frame synchronization BDR1 I McBSP1 receive serial data BFSR1 I/O/Z McBSP1 receive frame synchronization BCLKR1 I/O/Z McBSP1 receive clock BFSX1 I/O/Z McBSP1 transmit frame synchronization BCLKX1 I/O/Z McBSP1 transmit clock BDX1 O/Z McBSP1 transmit data DSP_A00-- DSP_A19 O/Z DSP Address bits 0 through 19 DSP_D00--DSP_D15 I/O/Z DSP Data bus bits 0 through 15 DSP_MSTRB O/Z DSP memory strobe signal, active-low DSP_DS O/Z DSP data space select, active-low DSP_INT0 I DSP external interrupt, active-low. If this signal is unused, it should be pulled high with an external pullup resistor. DSP_IOSTRB O/Z DSP I/O strobe signal, active-low DSP_IS O/Z DSP I/O space select, active-low DSP_PS O/Z DSP program space select, active-low DSP_READY I DSP data ready input (tie high if not used), active-high. If this signal is unused, it must be pulled high with an external pullup resistor. DSP_R/W O/Z DSP active-high read / active-low write signal † I = input, O = output, Z = high-impedance ‡ The KBGPIO[15:8] pins include integrated pullup resistors. § The ARM7TDMI core can operate in either little- or big-endian mode. The 5471 configures the ARM7TDMI core’s endianness by sampling this pin at the RESET rising edge. ¶ 5471 only supports MCU boot from a 16-bit or a 32-bit-wide memory implementation on CS0. The 5471 configures the ARM7TDMI starting instruction size, and width of memory connected to CS0, by sampling this pin at the RESET rising edge. |
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