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TNETV1002IDZHK 数据表(PDF) 40 Page - Texas Instruments |
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TNETV1002IDZHK 数据表(HTML) 40 Page - Texas Instruments |
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40 / 102 page  MCU Subsystem Functional Overview 30 June 2001 -- Revised December 2002 SPRS180C The enhanced emulation features provide the following debugging capabilities: • Single processor (MCU only) and multiprocessor (MCU and DSP) debug • High-level language and assembly debug (run, halt, step...) • Real-time (MCU continuously running) or non-real-time (MCU stopped) debug options • Supports both 32- and 16-bit ARM7TDMI modes • Endianess transparency • Unlimited breakpoints via opcode replacement (software breakpoint) • Two hardware breakpoints (one configurable as software breakpoint) with maskable cycle type, address and data compare • Two external breakpoint events (EMU0,EMU1 pins) • Internal events generate external triggers • Benchmarking/profiling capability 4.1.2 MCU Memory Space The MCU memory space includes internal RAM, internal peripherals, and areas for access to external memories and peripherals connected to the CS0--CS3 and CS4 pins, and external SDRAM. The MCU memory map is summarized in Table 4--1. Table 4--1. MCU Memory Space NAME START ADDRESS STOP ADDRESS SIZE IN BYTES DATA ACCESS CS0 0000:0000 007F:FFFF 8M 8/16/32 CS1 0080:0000 00FF:FFFF 8M 8/16/32 CS2 0100:0000 017F:FFFF 8M 8/16/32 CS3 0180:0000 01FF:FFFF 8M 8/16/32 CS4 0200:0000 027F:FFFF 8M 8/16/32 Reserved 0280:0000 0FFF:FFFF SDRAM_CS 1000:0000 11FF:FFFF 32M 8/16/32 Reserved 1200:0000 FFBF:FFFF Internal SRAM FFC0:0000 FFC0:3FFF 16K 8/16/32 Reserved FFC0:4000 FFCF:FFFF EIM SRAM FFD0:0000 FFD0:3FFF 16K 8/16/32 Reserved FFD0:4000 FFDF:FFFF API RAM FFE0:0000 FFE0:3FFF 16K 16/32 Reserved FFE0:4000 FFF3:FFFF API registers FFE4:0000 FFE4:0001 2 16 Reserved FFE4:0002 FFFE:FFFF EIM FFFF:0000 FFFF:07FF 2K 32 UART_IRDA FFFF:0800 FFFF:0FFF 2K 32 UART FFFF:1000 FFFF:17FF 2K 32 I2C FFFF:1800 FFFF:1FFF 2K 32 SPI FFFF:2000 FFFF:27FF 2K 32 GPIO FFFF:2800 FFFF:28FF 256 32 KGPIO FFFF:2900 FFFF:29FF 256 32 Timer0 FFFF:2A00 FFFF:2AFF 256 32 Timer1 FFFF:2B00 FFFF:2BFF 256 32 Timer2 FFFF:2C00 FFFF:2CFF 256 32 INTH FFFF:2D00 FFFF:2DFF 256 32 MEMINT FFFF:2E00 FFFF:2EFF 256 32 |
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