TNETV1002IDZHK datasheet(52/102 Pages) TI1

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MCU Subsystem Functional Overview

June 2001 -- Revised December 2002

SPRS180C

4.5

MCU Peripheral Clock Management

The 5471 device is clocked by the external clock input, REFCLK. The 5471 REFCLK input does not provide

a clock oscillator, so it must be driven by a square-wave input signal that meets VIH and VIL requirements.

Both subsystems (DSP and MCU) derive their clocks from REFCLK using software-programmable PLLs.

Immediately following reset or power up, the contents of the respective CLKMD registers for both subsystems

depend on the status of the programmable internal ports on their respective PLLs. For the MCU subsystem,

these internal ports are hardwired so that the programmable capability of default mode is not available. For

the DSP subsystem, the programmable internal ports to the DSP PLL are connected to the output of a register

(DSP_REG) that is controlled by the RISC processor. This allows the DSP PLL default values to be

programmable under the control of the MCU subsystem. The clock management scheme is shown in

Figure 4--3.

÷ 2(N+1)

ARM_clock

AUDIO_CLK

REFCLK

PLL_DSP

DSP_clock

ARM

PLL_ARM

÷ D

Power-

Down

Module

Shut-down

DSP

EIM

UART

IrDA

UART

SPI

I2C

EIM_clock

D=512

TIMER

Select_ARM_clk

INTH

Asynchronous

wake-up

IrDA _clock

UART_clock

SPI_clock

I2C_clock

TIMER_clock

Interrupts

from

peripherals

GPIO

GPIO_clock

Shut-down

Figure 4--3. Clock Management Module

The MCU subsystem operates in one of three modes: PLL (normal) mode, DIV mode, or power-down mode.

In power-down mode, the input clock frequency is divided by a large value (512 -- 1023). Configuring the

operation of the MCU subsystem clock module in power-down mode and using divisor values below 512 will

result in stopping the clock.

Similar to the DSP clock, the MCU subsystem clock is also derived from the scaled version of the input clock,

REFCLK. The PLL used by the RISC has the same look and feel as the DSP PLL. For this reason, the RISC

processor uses the same minimum input-clock-frequency restriction and scaling values as the DSP.

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