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HC705JJ7GRS/D 数据表(PDF) 184 Page - NXP Semiconductors |
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HC705JJ7GRS/D 数据表(HTML) 184 Page - NXP Semiconductors |
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184 / 230 page ![]() EPROM/OTPROM General Release Specification MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0 EPROM/OTPROM 13.3.3 EPROM Security Bit (EPMSEC) An EPROM programmable bit is provided at the location of the COP watchdog register at $1FF0 as shown in Figure 13-3. This bit allows control of access to the EPROM array. Any accesses of the EPROM locations will return undefined results when the EPMSEC bit is set. Refer to 13.4.2 EPMSEC Programming for programming instructions. EPMSEC — EPROM Security1 This EPROM write-only bit enables the access to the EPROM array. 1 = Access to the EPROM array in non-user modes is denied 0 = Access to the EPROM array in non-user modes is enabled 1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or copying the EPROM/OTPROM difficult for unauthorized users. 13.4 EPROM Programming A programming board is available from Motorola to download to the on- chip EPROM/OTPROM using the factory-provided programming software. Factory-provided software for programming the EPROM is available through the Motorola Freeware Bulletin Board Service (BBS). The number is (512) 891-FREE. After making the connection, type bbs in lowercase letters and press the return key to start the BBS software. The programming software copies to the 6144-byte space located at EPROM addresses $0700–$1EFF and to the 16-byte space at $1FF0 Bit 7 654321 Bit 0 Read: EPMSEC OPT Write: COPC Reset: Unaffected by Reset Erased: 0 ——————— = Unimplemented Figure 13-3. EPROM Security in COP Register (COP) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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