 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
AD9547/PCBZ 数据表(PDF) 5 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9547/PCBZ 数据表(HTML) 5 Page - Analog Devices |
|
|
5 / 104 page  AD9547 Rev. 0 | Page 5 of 104 LOGIC INPUTS (M0 TO M7, RESET) Table 4. Parameter Min Typ Max Unit Test Conditions/Comments INPUT VOLTAGE Input High Voltage (VIH) 2.1 V Input Low Voltage (VIL) 0.8 V INPUT CURRENT (IINH, IINL) ±80 ±200 μA INPUT CAPACITANCE (CIN) 3 pF LOGIC OUTPUTS (M0 TO M7, IRQ) Table 5. Parameter Min Typ Max Unit Test Conditions/Comments OUTPUT VOLTAGE Output High Voltage (VOH) 2.7 V IOH = 1 mA Output Low Voltage (VOL) 0.4 V IOL = 1 mA IRQ LEAKAGE CURRENT Open-drain mode Active Low Output Mode 1 μA VOH = 3.3 V Active High Output Mode 1 μA VOL = 0 V SYSTEM CLOCK INPUTS (SYSCLKP, SYSCLKN) Table 6. Parameter Min Typ Max Unit Test Conditions/Comments SYSTEM CLOCK PLL BYPASSED Input Frequency Range 500 1000 MHz Minimum Input Slew Rate 1000 V/μs Minimum limit imposed for jitter performance Duty Cycle 40 60 % Common-Mode Voltage 1.2 V Internally generated Differential Input Voltage Sensitivity 100 mV p-p Minimum voltage across pins is required to ensure switching between logic states; the instantaneous voltage on either pin must not exceed the supply rails; ac ground the unused input to accommodate single-ended operation Input Capacitance 2 pF Single-ended, each pin Input Resistance 2.5 kΩ SYSTEM CLOCK PLL ENABLED PLL Output Frequency Range 900 1000 MHz Phase Frequency Detector (PFD) Rate 150 MHz Frequency Multiplication Range 6 255 Assumes valid system clock and PFD rates VCO Gain 70 MHz/V High Frequency Path Input Frequency Range 100.1 500 MHz Minimum Input Slew Rate 200 V/μs Minimum limit imposed for jitter performance Frequency Divider Range 1 8 Binary steps (M = 1, 2, 4, 8) Common-Mode Voltage 1 V Internally generated Differential Input Voltage Sensitivity 100 mV p- p This is the minimum voltage required across the pins to ensure switching between logic states; the instantaneous voltage on either pin must not exceed the supply rails; ac ground the unused input to accommodate single-ended operation Input Capacitance 3 pF Single-ended, each pin Input Resistance 2.5 kΩ |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
