AD9547SLASHPCBZ datasheet(77/104 Pages) AD

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AD9547

Rev. 0 | Page 77 of 104

Table 75. Reference Logic Family

Address

Bit

Bit Name

Description

0x0501

[7:6]

Ref BB logic family

Select the logic family for the REF BB input receiver (ignored if Bits[5:4] = 00).

00 (default) = disabled.

01 = 1.2 V to 1.5 V CMOS.

10 = 1.8 V to 2.5 V CMOS.

11 = 3.0 V to 3.3 V CMOS.

[5:4]

Ref B logic family

Select logic family for REF B input receiver.

00 (default) = differential (REFB/BB is positive/negative input).

01 = 1.2 V to 1.5 V CMOS.

10 = 1.8 V to 2.5 V CMOS.

11 = 3.0 V to 3.3 V CMOS.

[3:2]

Ref AA logic family

The same as Register 0x0501, Bits[7:6] but for REF AA.

[1:0]

Ref A logic family

The same as Register 0x0501, Bits[5:4] but for REF A.

0x0502

[7:0]

Unused

Unused.

Table 76. Manual Reference Profile Selection

Address

Bit

Bit Name

Description

0x0503

Enable Ref AA manual profile

Select manual or automatic reference profile assignment for REF AA.

0 (default) = automatic.

1 = manual.

[6:4]

Ref AA manual profile

Manual profile assignment.

000 (default) = Profile 0.

001 = Profile 1.

010 = Profile 2.

011 = Profile 3.

100 = Profile 4.

101 = Profile 5.

110 = Profile 6.

111 = Profile 7.

Enable Ref A manual profile

Same as Register 0x0503, Bit 7 but for REF A.

[2:0]

Ref A manual profile

Same as Register 0x0503, Bits[6:4] but for REF A.

0x0504

Enable Ref BB manual profile

Same as Register 0x0503, Bit 7 but for REF BB.

[6:4]

Ref BB manual profile

Same as Register 0x0503, Bits[6:4] but for REF BB.

Enable Ref B manual profile

Same as Register 0x0503, Bit 7 but for REF B.

[2:0]

Ref B manual profile

Same as Register 0x0503, Bits[6:4] but for REF B.

0x0505

[7:0]

Unused

Unused.

0x0506

[7:0]

Table 77. Phase Build-Out Switching

Address

Bit

Bit Name

Description

0x0507

[7:3]

Unused

Unused.

[2:0]

Phase master threshold

priority

Threshold priority level (a value of 0 to 7, with 0 (default) being the highest priority

level). References with a selection priority value lower than this value are treated as

phase masters (see the profile registers for selection priority value).

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