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AD9547/PCBZ 数据表(PDF) 94 Page - Analog Devices |
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AD9547/PCBZ 数据表(HTML) 94 Page - Analog Devices |
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94 / 104 page  AD9547 Rev. 0 | Page 94 of 104 Table 140. Input Reference Status Address Bit Bit Name Description 0x0D0C 7 Profile selected The control logic sets this bit when it assigns Ref A to one of the eight profiles. [6:4] Selected profile The index (0 to 7) of the profile assigned to Ref A. Note that these bits are meaningless unless Bit 7 = 1. 3 Valid Ref A is valid for use (that is, it is unfaulted, and its validation timer has expired). 2 Fault Ref A is not valid for use. 1 Fast If Bit 7 = 1, this bit indicates that the frequency of Ref A is higher than allowed by its profile settings. If Bit 7 = 0, this bit indicates that the frequency of Ref A is above the maximum input reference frequency supported by the device. 0 Slow If Bit 7 = 1, this bit indicates that the frequency of Ref A is lower than allowed by its profile settings. If Bit 7 = 0, this bit indicates that the frequency of Ref A is below the minimum input reference frequency supported by the device. 0x0D0D [7:0] Same as 0x0D0C but for REF AA instead of REF A. 0x0D0E [7:0] Same as 0x0D0C but for REF B instead of REF A. 0x0D0F [7:0] Same as 0x0D0C but for REF BB instead of REF A. 0x0D10 [7:0] Unused Unused. 0x0D11 [7:0] 0x0D12 [7:0] 0x0D13 [7:0] Table 141. Holdover History1 Address Bit Bit Name Description 0x0D14 [7:0] Tuning word history Tuning word readback, Bits[7:0]. 0x0D15 [7:0] Tuning word readback, Bits[15:8]. 0x0D16 [7:0] Tuning word readack, Bits[23:16]. 0x0D17 [7:0] Tuning word readback, Bits[31:24]. 0x0D18 [7:0] Tuning word readback, Bits[39:32]. 0x0D19 [7:0] Tuning word readback, Bits[47:40]. 1 These registers contain the current 48-bit DDS frequency tuning word generated by the tuning word history logic. NONVOLATILE MEMORY (EEPROM) CONTROL (REGISTER 0x0E00 TO REGISTER 0x0E03) Table 142. Write Protect Address Bit Bit Name Description 0x0E00 [7:2] Unused Unused. 1 Half rate mode EEPROM serial communication rate. 0 (default) = 400 kHz (normal). 1 = 200 kHz. 0 Write enable EEPROM write enable/protect. 0 (default) = EEPROM is write protected. 1 = EEPROM is write enabled. Table 143. Condition Address Bit Bit Name Description 0x0E01 [7:5] Unused Unused. [4:0] Condition value When set to a nonzero value (default = 0), these bits establish the condition for EEPROM downloads. Table 144. Save Address Bit Bit Name Description 0x0E02 [7:1] Unused Unused. 0 Save to EEPROM Upload data to the EEPROM based on in the EEPROM storage sequence. This is an autoclearing bit. |
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