AD9547SLASHPCBZ datasheet(96/104 Pages) AD

96 / 104 page

AD9547

Rev. 0 | Page 96 of 104

Table 150. EEPROM Storage Sequence for Clock Distribution Settings

Address

Bit

Bit Name

Description

0x0E1B

[7:0]

Clock distribution

The default value of this register is 0x19, which the controller interprets as a data instruction. Its

decimal value is 25; this tells the controller to transfer 26 bytes of data (25 + 1) beginning at the

address specified by the next two bytes. The controller stores 0x19 in the EEPROM and

increments the EEPROM address pointer.

0x0E1C

[7:0]

Clock distribution

The default value of these two registers is 0x0400. Note that Register 0x0E1C and Register 0x0E1D

are the most significant and least significant bytes of the target address, respectively. Because

the previous register contains a data instruction, these two registers define a starting address

(in this case, 0x0400). The controller stores 0x0400 in the EEPROM and increments the EEPROM

pointer by 2. It then transfers 26 bytes from the register map (beginning at Address 0x0400) to

the EEPROM and increments the EEPROM address pointer by 27 (26 data bytes and one checksum

byte). The 26 bytes transferred correspond to the clock distribution parameters in the register map.

0x0E1D

[7:0]

0x0E1E

[7:0]

I/O update

The default value of this register is 0x80, which the controller interprets as an I/O update

instruction. The controller stores 0x80 in the EEPROM and increments the EEPROM address pointer.

Table 151. EEPROM Storage Sequence for Reference Input Settings

Address

Bit

Bit Name

Description

0x0E1F

[7:0]

Reference inputs

The default value of this register is 0x07, which the controller interprets as a data instruction. Its

decimal value is 7, which tells the controller to transfer eight bytes of data (7 + 1), beginning at the

address specified by the next two bytes. The controller stores 0x07 in the EEPROM and increments

the EEPROM address pointer.

0x0E20

[7:0]

Reference inputs

The default value of these two registers is 0x0500. Note that Register 0x0E20 and Register 0x0E21

are the most significant and least significant bytes of the target address, respectively. Because

the previous register contains a data instruction, these two registers define a starting address

(in this case, 0x0500). The controller stores 0x0500 in the EEPROM and increments the EEPROM

pointer by 2. It then transfers eight bytes from the register map (beginning at Address 0x0500) to the

EEPROM and increments the EEPROM address pointer by nine (eight data bytes and one checksum

byte). The eight bytes transferred correspond to the reference inputs parameters in the register map.

0x0E21

[7:0]

Table 152. EEPROM Storage Sequence for Profile 0 and Profile 1 Settings

Address

Bit

Bit Name

Description

0x0E22

[7:0]

Profile 0 and Profile 1

The default value of this register is 0x63, which the controller interprets as a data instruction. Its

decimal value is 99, which tells the controller to transfer 100 bytes of data (99 + 1), beginning at the

address specified by the next two bytes. The controller stores 0x63 in the EEPROM and

increments the EEPROM address pointer.

0x0E23

[7:0]

Profile 0 and Profile 1

The default value of these two registers is 0x0600. Note that Register 0x0E23 and Register 0x0E24

are the most significant and least significant bytes of the target address, respectively. Because

the previous register contains a data instruction, these two registers define a starting address

(in this case, 0x0600). The controller stores 0x0600 in the EEPROM and increments the EEPROM

pointer by 2. It then transfers 100 bytes from the register map (beginning at Address 0x0600) to

the EEPROM and increments the EEPROM address pointer by 101 (100 data bytes and one checksum

byte). The 99 bytes transferred correspond to the Profile 0 and Profile 1 parameters in the

0x0E24

[7:0]

Table 153. EEPROM Storage Sequence for Profile 2 and Profile 3 Settings

Address

Bit

Bit Name

Description

0x0E25

[7:0]

Profile 2 and Profile 3

The default value of this register is 0x63, which the controller interprets as a data instruction. Its

decimal value is 99, which tells the controller to transfer 100 bytes of data (99 + 1), beginning at

the address specified by the next two bytes. The controller stores 0x63 in the EEPROM and

increments the EEPROM address pointer.

0x0E26

[7:0]

Profile 2 and Profile 3

The default value of these two registers is 0x0680. Note that Register (0x0E26 and Register 0x0E27

are the most significant and least significant bytes of the target address, respectively. Because

the previous register contains a data instruction, these two registers define a starting address

(in this case, 0x0680). The controller stores 0x0680 in the EEPROM and increments the EEPROM

pointer by 2. It then transfers 100 bytes from the register map (beginning at Address 0x0680) to

the EEPROM and increments the EEPROM address pointer by 101 (100 data bytes and one checksum

byte). The 99 bytes transferred correspond to the Profile 2 and Profile 3 parameters in the

0x0E27

[7:0]

AD9547/PCBZ 数据表(PDF) 96 Page - Analog Devices

AD9547/PCBZ 数据表(HTML) 96 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

AD9547/PCBZ 数据表(PDF) 96 Page - Analog Devices

AD9547/PCBZ 数据表(HTML) 96 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载