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AD9547/PCBZ 数据表(PDF) 7 Page - Analog Devices |
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AD9547/PCBZ 数据表(HTML) 7 Page - Analog Devices |
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7 / 104 page  AD9547 Rev. 0 | Page 7 of 104 REFERENCE INPUTS (REFA/REFAA, REFB/REFBB) Table 8. Parameter Min Typ Max Unit Test Conditions/Comments DIFFERENTIAL OPERATION Frequency Range Sinusoidal Input 10 750 MHz LVPECL Input 0.001 750 MHz LVDS Input 0.001 750 MHz Minimum Input Slew Rate 40 V/μs Minimum limit imposed for jitter performance Common-Mode Input Voltage 2 V Internally generated Differential Input Voltage Sensitivity ±65 mV This is the minimum voltage required across the pins to ensure switching between logic states; the instantaneous voltage on either pin must not exceed the supply rails Input Resistance 25 kΩ Input Capacitance 3 pF Minimum Pulse Width High 620 ps Minimum Pulse Width Low 620 ps SINGLE-ENDED OPERATION Frequency Range (CMOS) 10 250 MHz Minimum Input Slew Rate 40 V/μs Minimum limit imposed for jitter performance Input Voltage High (VIH) 1.2 V to 1.5 V Threshold Setting 0.9 V 1.8 V to 2.5 V Threshold Setting 1.2 V 3.0 V to 3.3 V Threshold Setting 1.9 V Input Voltage Low (VIL) 1.2 V to 1.5 V Threshold Setting 0.27 V 1.8 V to 2.5 V Threshold Setting 0.5 V 3.0 V to 3.3 V Threshold Setting 1.0 V Input Resistance 45 kΩ Input Capacitance 3 pF Minimum Pulse Width High 1.5 ns Minimum Pulse Width Low 1.5 ns REFERENCE MONITORS Table 9. Parameter Min Typ Max Unit Test Conditions/Comments REFERENCE MONITOR Loss of Reference Detection Time 1.2 NPDP NPDP = nominal phase detector period (NPDP = fREF/R)1 Frequency Out-of-Range Limits 9.54 × 10−7 0.1 Δf/fREF Programmable (lower bound subject to quality of SYSCLK) TIMERS Validation Timer 0.001 65.535 sec Programmable in 1 ms increments Redetect Timer 0.001 65.535 sec Programmable in 1 ms increments 1 fREF is the frequency of the active reference; R is the frequency division factor determined by the R divider. |
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