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AD9547/PCBZ 数据表(PDF) 59 Page - Analog Devices |
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AD9547/PCBZ 数据表(HTML) 59 Page - Analog Devices |
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59 / 104 page  AD9547 Rev. 0 | Page 59 of 104 Addr Opt1 Name D7 D6 D5 D4 D3 D2 D1 D0 Def DPLL 0x0300 C Free-running frequency tuning word Free-running frequency tuning word[47:0] 0x00 0x0301 C 0x00 0x0302 C 0x00 0x0303 C 0x00 0x0304 C 0x00 0x0305 C 0x00 0x0306 A, C Update TW Unused Update TW 0x00 0x0307 C Pull-in range lower limit Pull-in range lower limit[23:0] 0x00 0x0308 C 0x00 0x0309 C 0x00 0x030A C Pull-in range upper limit Pull-in range upper limit[23:0] 0xFF 0x030B C 0xFF 0x030C C 0xFF 0x030D C Open-loop phase offset Open-loop phase offset word[15:0] 0x00 0x030E C 0x00 0x030F C Fixed closed- loop phase lock offset Fixed phase lock offset[39:0] (in ps; signed) 0x00 0x0310 C 0x00 0x0311 C 0x00 0x0312 C 0x00 0x0313 C 0x00 0x0314 C Incremental closed-loop phase lock offset step size Incremental phase lock offset step size[15:0] (in ps/step) 0xE8 0x0315 C 0x03 0x0316 C Phase slew rate limit Phase slew rate limit[15:0] (in ns/sec) 0x00 0x0317 C 0x00 0x0318 C History accumulation timer History accumulation timer[23:0] (in ms) 0x30 0x0319 C 0x75 0x031A C 0x00 0x031B C History mode Unused Single sample fallback Persistent history Incremental average[2:0] 0x00 Clock Distribution Output Configuration 0x0400 S Distribution settings Unused External distribution resistor Receiver mode Unused OUT1 power- down OUT0 power- down 0x0C 0x0401 S Distribution enable Unused OUT1 enable OUT0 enable 0x00 0x0402 S Distribution synchronization Unused Sync source[1:0] Unused OUT1 sync mask OUT0 sync mask 0x00 0x0403 C Automatic synchronization Unused Automatic sync mode[1:0] 0x00 0x0404 S Distribution channel modes Unused OUT0 CMOS phase invert OUT0 polarity invert OUT0 drive strength OUT0 mode 0x03 0x0405 S Unused OUT1 CMOS phase invert OUT1 polarity invert OUT1 drive strength OUT1 mode 0x03 0x0406 S Unused Unused 0x03 0x0407 S 0x03 0x0408 S Distribution channel divider, Q0 Q0[23:0] 0x00 0x0409 S 0x00 0x040A S 0x00 0x040B S Unused Q0[29:24] 0x00 0x040C S Distribution channel divider, Q1 Q1[23:0] 0x00 0x040D S 0x00 0x040E S 0x00 0x040F S Unused Q1[29:24] 0x00 |
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