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AD9547/PCBZ 数据表(PDF) 52 Page - Analog Devices |
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AD9547/PCBZ 数据表(HTML) 52 Page - Analog Devices |
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52 / 104 page  AD9547 Rev. 0 | Page 52 of 104 SPI Instruction Word (16 Bits) When Register 0x0000, Bit 6 = 1 (LSB first), the instruction and data bytes must be written from LSB to MSB. Multibyte data trans- fers in LSB-first format start with an instruction byte that includes the register address of the least significant payload byte, followed by multiple data bytes. The serial control port internal byte address generator increments for each byte of the multibyte transfer cycle. The MSB of the 16-bit instruction word is R/W, which indicates whether the instruction is a read or a write. The next two bits, W1 and W0, indicate the number of bytes in the transfer (see ). The final 13 bits are the register address (A12 to A0), which indi- cates the starting register address of the read/write operation (see ). Table 30 Table 32 For multibyte MSB-first (default) I/O operations, the serial control port register address decrements from the specified starting address toward Address 0x0000. For multibyte LSB-first I/O operations, the serial control port register address increments from the starting address toward Address 0x1FFF. Unused addresses are not skipped during multibyte I/O operations; therefore, the user should write the default value to a reserved register and 0s to unmapped registers. Note that it is more efficient to issue a new write command than to write the default value to more than two consecutive reserved (or unmapped) registers. SPI MSB/LSB First Transfers The AD9547 instruction word and payload can be MSB first or LSB first. The default for the AD9547 is MSB first. The LSB-first mode can be set by writing a 1 to Register 0x0000, Bit 6. Immedi- ately after the LSB-first bit is set, subsequent serial control port operations are LSB first. When MSB-first mode is active, the instruction and data bytes must be written from MSB to LSB. Multibyte data transfers in MSB-first format start with an instruction byte that includes the register address of the most significant payload byte. Subsequent data bytes must follow in order from high address to low address. In MSB-first mode, the serial control port internal address generator decrements for each data byte of the multibyte transfer cycle. Table 31. Streaming Mode (No Addresses Are Skipped) Write Mode Address Direction Stop Sequence LSB First Increment 0x0000 ... 0x1FFF MSB First Decrement 0x1FFF ... 0x0000 Table 32. Serial Control Port, 16-Bit Instruction Word, MSB First MSB LSB I15 I14 I13 I12 I11 I10 I9 I8 I7 I6 I5 I4 I3 I2 I1 I0 R/W W1 W0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CS SCLK DON'T CARE SDIO A12 W0 W1 R/W A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 DON'T CARE DON'T CARE DON'T CARE 16-BIT INSTRUCTION HEADER REGISTER (N) DATA REGISTER (N – 1) DATA Figure 51. Serial Control Port Write—MSB First, 16-Bit Instruction, Two Bytes of Data CS SCLK SDIO SDO REGISTER (N) DATA 16-BIT INSTRUCTION HEADER REGISTER (N – 1) DATA REGISTER (N – 2) DATA REGISTER (N – 3) DATA A12 W0 W1 R/W A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DON'T CARE DON'T CARE DON'T CARE DON'T CARE D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 Figure 52. Serial Control Port Read—MSB First, 16-Bit Instruction, Four Bytes of Data tS DON'T CARE DON'T CARE W1 W0 A12 A11 A10 A9A8A7A6A5 D4D3 D2D1D0 DON'T CARE DON'T CARE R/W tDS tDH tHIGH tLOW tCLK tC CS SCLK SDIO Figure 53. Serial Control Port Write—MSB First, 16-Bit Instruction, Timing Measurements |
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