WM8944BECSSLASHR datasheet(51/165 Pages) CIRRUS

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WM8944B

Rev 4.3

DIGITAL BEEP GENERATOR

The WM8944B provides a digital signal generator which can be used to inject an audio tone (beep)

into the DAC signal path. The output of the beep generator is digitally mixed with the DAC outputs,

after the DAC digital volume.

The beep is enabled using BEEP_ENA. The beep function creates an approximation of a Sine wave.

The audio frequency is set using BEEP_RATE. The beep volume is set using BEEP_GAIN. Note that

the volume of the digital beep generator is not affected by the DAC volume or DAC mute controls but

the DAC_ENA bit must be set.

The DAC_AUTOMUTE bit should not be set when the BEEP generator is used.

The digital beep generator control fields are described in Table 30.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R37 (25h)

Beep Control

6:3

BEEP_GAIN [3:0]

0000

Digital Beep Volume Control

0000 = mute

0001 = -83dB

0010 = -77dB

… (6dB steps)

1111 = +1dB

2:1

BEEP_RATE [1:0]

Beep Waveform Control

00 = Reserved

01 = 1kHz

10 = 2kHz

11 = 4kHz

BEEP_ENA

Digital Beep Enable

0 = Disabled

1 = Enabled

Note that the DAC and associated

signal path needs to be enabled

when using the digital beep.

Table 30 Digital Beep Generator

OUTPUT SIGNAL PATH

The WM8944B provides a Line Output mixer and a Speaker Output mixer. Multiple inputs to each

mixer provide a high degree of flexibility to route different signal paths to each of the analogue

outputs.

The DAC output can be routed to the mixers either directly or in inverted phase. This provides

additional capability to generate differential (BTL) output signals.

The analogue inputs AUX and IN1 can be configured as a differential signal path to the mixers,

bypassing the Input PGA. This configuration can be used to minimise power consumption.

The analogue inputs AUX and IN1 can be routed directly to the Speaker outputs, bypassing the

Speaker PGA and mixers. This can be used to provide a fixed-

gain signal path for a “PC Beep” or

similar application.

The output signal paths and associated control registers are illustrated in Figure 18.

Note that the speaker outputs are intended to drive a mono headset or speaker (in BTL configuration).

They are not designed to drive stereo speakers.

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