WM8944BECSSLASHR datasheet(100/165 Pages) CIRRUS

100 / 165 page

WM8944B

100

Rev 4.3

RECOMMENDED POWER-UP / POWER-DOWN SEQUENCES

In order to minimise output pop and click noise, it is recommended that the WM8944B device is

powered-up and powered-down using the control sequences described in Table 71 and Table 72

respectively.

The power-up sequence described here includes enabling the DACs and output drivers; note that

additional configuration will be required to enable the required internal signal paths.

The sequences noted here are provided as guidance only; each sequence will require to be adjusted

to the particular application requirements.

DESCRIPTION

LABEL

Turn on external supplies and wait for the supply voltages to settle.

Reset registers to default state (software reset).

SW_RESET

R0 (00h) [15:0]

Enable speaker and line discharge bits.

Enable VMID to speaker and line outputs.

SPKP_DISCH = 1

SPKN_DISCH = 1

LINE_DISCH = 1

SPKP_VMID_OP_ENA = 1

SPKN_VMID_OP_ENA = 1

LINE_VMID_OP_ENA = 1

R42 (2Ah) [6]

R42 (2Ah) [7]

R42 (2Ah) [4]

R42 (2Ah) [12]

R42 (2Ah) [13]

R42 (2Ah) [10]

Enable VMID Fast Start and Start up Bias. Select Start-Up Bias and

set VMID soft start for start-up ramp.

VMID_FAST_START = 1

STARTUP_BIAS_ENA = 1

BIAS_SRC = 1

VMID_RAMP[1:0] = 01

R7 (07h) [11]

R7 (07h) [8]

R7 (07h) [7]

R7 (07h) [6:5]

If using VMID as the reference voltage for the LDO then select VMID

fast start or set to 0 if using the Bandgap as the reference voltage for

LDO. Select LDO Start-Up Bias and enable LDO.

Delay 300ms for LDO to settle.

LDO_ENA = 1

LDO_REF_SEL_FAST = 1

LDO_BIAS_SRC = 1

R53 (35h) [15]

R53 (35h) [14]

R53 (35h) [5]

Enable VMID Buffer and Master Bias.

Set VMID_SEL[1:0] for fast start-up.

BIAS_ENA = 1

VMID_BUF_ENA = 1

VMID_SEL[1:0] = 11

R2 (02h) [3]

R2 (02h) [2]

R2 (02h) [1:0]

Disable speaker and line discharge bits.

SPKP_DISCH = 0

SPKN_DISCH = 0

LINE_DISCH = 0

R42 (2Ah) [6]

R42 (2Ah) [7]

R42 (2Ah) [4]

Enable speaker outputs and speaker PGA and lineout output as

required.

SPK_MIX_ENA = 1

DAC_ENA = 1

SPKN_OP_ENA = 1

SPKP_OP_ENA = 1

SPK_PGA_ENA = 1

OUT_ENA = 1

R3 (03h) [2]

R3 (03h) [0]

R3 (03h) [7]

R3 (03h) [6]

R3 (03h) [12]

R3 (03h) [14]

Enable power to speaker driver

(must be done after enabling the speaker outputs).

SPKN_SPKVDD_ENA = 1

SPKP_SPKVDD_ENA = 1

R3 (03h) [11]

R3 (03h) [10]

Enable VMID. Delay 50ms to allow VMID to settle.

VMID_ENA = 1

R7 (07h) [4]

Set LDO and VMID for normal operation.

LDO_REF_SEL_FAST = 0

LDO_BIAS_SRC = 0

VMID_FAST_START = 0

STARTUP_BIAS_ENA = 0

VMID_SEL = 01

R53 (35h) [14]

R53 (35h) [5]

R7 (07h) [11]

R7 (07h) [8]

R2 (02h) [1:0]

Un-mute outputs as required.

Table 71 Recommended Power-Up Sequence

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