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WM8944BECS/R 数据表(PDF) 19 Page - Cirrus Logic

部件名 WM8944BECS/R
功能描述  Mono Low-Power CODEC with Video Buffer
PDF  165 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

WM8944BECS/R 数据表(HTML) 19 Page - Cirrus Logic

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WM8944B
Rev 4.3
19
CONTROL INTERFACE TIMING
SCLK
(input)
SDA
t4
t3
START
t8
STOP
t5
t2
t1
t9
t7
t6
Figure 5 Control Interface Timing - 2-wire (I2C) Control Mode
Test Conditions
DCVDD = 1.8V, DBVDD = LDOVDD = SPKVDD = 3.3V, LDOVOUT = 3.0V, GND = 0V,
TA = +25
oC, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
SCLK Frequency
400
kHz
SCLK Low Pulse-Width
t1
1300
ns
SCLK High Pulse-Width
t2
600
ns
Hold Time (Start Condition)
t3
600
ns
Setup Time (Start Condition)
t4
600
ns
Data Setup Time
t5
100
ns
SDA, SCLK Rise Time
t6
300
ns
SDA, SCLK Fall Time
t7
300
ns
Setup Time (Stop Condition)
t8
600
ns
Data Hold Time
t9
900
ns
Pulse width of spikes that will be suppressed
tps
0
5
ns



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