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WM8944BECS/R 数据表(PDF) 78 Page - Cirrus Logic |
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WM8944BECS/R 数据表(HTML) 78 Page - Cirrus Logic |
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78 / 165 page ![]() WM8944B 78 Rev 4.3 For best FLL performance, a non-integer value of N.K is required. In this case, the fractional mode must be enabled by setting FLL_FRAC = 1. The FLL settings must be adjusted, if necessary, to produce a non-integer value of N.K. The FLL output frequency is generated according to the following equation: FOUT = (FVCO / FLL_OUTDIV) The FLL operating frequency, FVCO is set according to the following equation: FVCO = (FREF x N.K x FLL_FRATIO) FREF is the input frequency, as determined by FLL_CLK_REF_DIV. FVCO must be in the range 90-100 MHz. Frequencies outside this range cannot be supported. Note that the output frequencies that do not lie within the ranges quoted above cannot be guaranteed across the full range of device operating temperatures. In order to follow the above requirements for FVCO, the value of FLL_OUTDIV should be selected according to the desired output FOUT, as described in Table 53. OUTPUT FREQUENCY FOUT FLL_OUTDIV 2.8125 MHz – 3.125 MHz 4h (divide by 32) 5.625 MHz – 6.25 MHz 3h (divide by 16) 7.5 MHz - 8.333 MHz 7h (divide by 12) 11.25 MHz – 12.5 MHz 2h (divide by 8) 15 MHz - 16.667 MHz 6h (divide by 6) 22.5 MHz – 25 MHz 1h (divide by 4) 45 MHz – 50 MHz 0h (divide by 2) Table 53 Selection of FLL_OUTDIV The value of FLL_FRATIO should be selected as described in Table 54. REFERENCE FREQUENCY FREF FLL_FRATIO 1MHz - 13.5MHz 0h (divide by 1) 256kHz - 1MHz 1h (divide by 2) 128kHz - 256kHz 2h (divide by 4) 16kHz - 128kHz 3h (divide by 8) Less than 16kHz 4h (divide by 16) Table 54 Selection of FLL_FRATIO In order to determine the remaining FLL parameters, the FLL operating frequency, FVCO, must be calculated, as given by the following equation: FVCO = (FOUT x FLL_OUTDIV) The value of FLL_N and FLL_K can then be determined as follows: N.K = FVCO / (FLL_FRATIO x FREF) Note that FREF is the input frequency, after division by FLL_CLK_REF_DIV, where applicable. |
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