WM8944BECSSLASHR datasheet(41/165 Pages) CIRRUS

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WM8944B

Rev 4.3

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R33 (21h)

DRC Control 5

DRC_KNEE2_OP_

ENA

DRC_KNEE2_OP Enable

0 = Disabled

1 = Enabled

12:8

DRC_KNEE2_OP

00000

Output signal at the Noise Gate

threshold

‘Knee2’.

00000 = -30dB

00001 = -31.5dB

00010 = -33dB

… (-1.5dB steps)

11110 = -75dB

11111 = -76.5dB

See Table 18 for details

Only applicable when

DRC_KNEE2_OP_ENA = 1.

7:3

DRC_KNEE_OP

00000

Output signal at the Compressor

‘Knee’.

00000 = 0dB

00001 = -0.75dB

00010 = -1.5dB

… (-0.75dB steps)

11110 = -22.5dB

11111 = Reserved

See Table 18 for details

2:0

DRC_HI_COMP

011

Compressor slope (upper region)

000 = 1 (no compression)

001 = 1/2

010 = 1/4

011 = 1/8

100 = 1/16

101 = 0

110 = Reserved

111 = Reserved

R35 (23h)

DRC Control 7

9:8

DRC_NG_EXP

Noise Gate slope

00 = 1 (no expansion)

01 = 2

10 = 4

11 = 8

7:5

DRC_LO_COMP

000

Compressor slope (lower region)

000 = 1 (no compression)

001 = 1/2

010 = 1/4

011 = 1/8

100 = 0

101 = Reserved

11X = Reserved

Table 17 DRC Control Registers

WM8944BECS/R 数据表(PDF) 41 Page - Cirrus Logic

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