WM8944BECSSLASHR datasheet(88/165 Pages) CIRRUS

88 / 165 page

WM8944B

Rev 4.3

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

14:13

GP1_PULL [1:0]

GPIO1 pull-up / pull-down Enable

00 = no pull-up or pull-down

01 = pull-down

10 = pull-up

11 = reserved

GP1_INT_

MODE

GPIO1 Interrupt Mode

0 = GPIO interrupt is rising edge

triggered (if GP1_POL=0) or falling

edge triggered (if GP1_POL =1)

1 = GPIO interrupt is triggered on

rising and falling edges

GP1_POL

GPIO1 Polarity Select

0 = Non-inverted

1 = Inverted

GP1_LVL

GPIO1 level. Write to this bit to set

a GPIO output. Read from this bit to

read GPIO input level.

When GP1_POL is set, the register

contains the opposite logic level to

the external pin.

3:0

GP1_FN [3:0]

0000

GPIO1 Pin Function

(see Table 62 for details)

R14 (0Eh)

GPIO2

Control

GP2_DIR

GPIO2 Pin Direction

0 = Output

1 = Input

14:13

GP2_PULL [1:0]

GPIO2 pull-up / pull-down Enable

00 = no pull-up or pull-down

01 = pull-down

10 = pull-up

11 = reserved

GP2_INT_

MODE

GPIO2 Interrupt Mode

0 = GPIO interrupt is rising edge

triggered (if GP2_POL=0) or falling

edge triggered (if GP2_POL =1)

1 = GPIO interrupt is triggered on

rising and falling edges

GP2_POL

GPIO2 Polarity Select

0 = Non-inverted

1 = Inverted

GP2_LVL

GPIO2 level. Write to this bit to set

a GPIO output. Read from this bit to

read GPIO input level.

When GP2_POL is set, the register

contains the opposite logic level to

the external pin.

3:0

GP2_FN [3:0]

0000

GPIO2 Pin Function

(see Table 62 for details)

Table 61 GPIO Control

GPIO FUNCTION SELECT

The available GPIO functions are described in Table 62. The function of each GPIO is set using the

GPn_FN register, where n identifies the GPIO pin (1 or 2).

Note that the polarity of the GPIO inputs and outputs may be selected using the GPn_POL register

bits. When GPn_POL = 1, then the polarity is inverted with respect to the descriptions below.

WM8944BECS/R 数据表(PDF) 88 Page - Cirrus Logic

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