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WM8944BECS/R 数据表(PDF) 85 Page - Cirrus Logic |
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WM8944BECS/R 数据表(HTML) 85 Page - Cirrus Logic |
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85 / 165 page ![]() WM8944B Rev 4.3 85 RECOMMENDED VIDEO BUFFER INITIALISATION SEQUENCES Recommended power-up sequences for Video Buffer applications are described in Table 58 and Table 59. DESCRIPTION LABEL REGISTER [BITS] Turn on external supplies and wait for the supply voltages to settle. Reset registers to default state (software reset). SW_RESET R0 (00h) [15:0] Enable VMID Fast Start and Start up Bias. Select Start-Up Bias and set VMID soft start for start-up ramp. VMID_FAST_START = 1 STARTUP_BIAS_ENA = 1 BIAS_SRC = 1 VMID_RAMP[1:0] = 01 R7 (07h) [11] R7 (07h) [8] R7 (07h) [7] R7 (07h) [6:5] If using VMID as the reference voltage for the LDO then select VMID fast start or set to 0 if using the Bandgap as the reference voltage for LDO. Select LDO Start-Up Bias and enable LDO. Delay 300ms for LDO to settle. LDO_ENA = 1 LDO_REF_SEL_FAST = 1 LDO_BIAS_SRC = 1 R53 (35h) [15] R53 (35h) [14] R53 (35h) [5] Enable VMID Buffer and Master Bias. Set VMID_SEL[1:0] for fast start-up. BIAS_ENA = 1 VMID_BUF_ENA = 1 VMID_SEL[1:0] = 11 R2 (02h) [3] R2 (02h) [2] R2 (02h) [1:0] Enable VMID. Delay 50ms to allow VMID to settle. VMID_ENA = 1 R7 (07h) [4] Set LDO and VMID for normal operation. LDO_REF_SEL_FAST = 0 LDO_BIAS_SRC = 0 VMID_FAST_START = 0 STARTUP_BIAS_ENA = 0 VMID_SEL = 01 R53 (35h) [14] R53 (35h) [5] R7 (07h) [11] R7 (07h) [8] R2 (02h) [1:0] Set Video Buffer Gain as required. VB_GAIN R38 (26h) [5] Set Video Buffer Filter Q Boost as required. VB_QBOOST R38 (26h) [6] Enable Video Buffer Clamp. VB_CLAMP = 1 R38 (26h) [0] Enable Video Buffer Pulldown. VB_PD = 1 R38 (26h) [1] Enable video buffer. Delay 20ms for buffer to capture input level. VB_ENA = 1 R38 (26h) [7] Disable Video Buffer Pulldown. VB_PD = 0 R38 (26h) [1] Table 58 Power-Up Sequence (Video Signal AC-coupled to Video Buffer input) |
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