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WM8944BECS/R 数据表(PDF) 135 Page - Cirrus Logic

部件名 WM8944BECS/R
功能描述  Mono Low-Power CODEC with Video Buffer
PDF  165 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

WM8944BECS/R 数据表(HTML) 135 Page - Cirrus Logic

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WM8944B
Rev 4.3
135
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
L1
0
Register 5Eh SE1_DF1_L1
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R95 (5Fh)
SE1_DF1_
L2
15:0
SE1_DF1_L2
[15:0]
0000_0000
_0000_000
0
Filter coefficients for Signal Enhancement 1 (SE1) channel
DF1 filter
Register 5Fh SE1_DF1_L2
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R96 (60h)
SE1_DF1_
R0
15:0
SE1_DF1_R0
[15:0]
0001_0000
_0000_000
0
Filter coefficients for Signal Enhancement 1 (SE1) right
channel DF1 filter
Register 60h SE1_DF1_R0
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R97 (61h)
SE1_DF1_
R1
15:0
SE1_DF1_R1
[15:0]
0000_0000
_0000_000
0
Filter coefficients for Signal Enhancement 1 (SE1) right
channel DF1 filter
Register 61h SE1_DF1_R1
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R98 (62h)
SE1_DF1_
R2
15:0
SE1_DF1_R2
[15:0]
0000_0000
_0000_000
0
Filter coefficients for Signal Enhancement 1 (SE1) right
channel DF1 filter
Register 62h SE1_DF1_R2
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R99 (63h)
SE2_HPF_
CONFIG
1
SE2_HPF_R
_ENA
0
SE2 Right channel High-pass filter enable
0 = Disabled
1 = Enabled
0
SE2_HPF_L
_ENA
0
SE2 Left channel High-pass filter enable
0 = Disabled
1 = Enabled
Register 63h SE2_HPF_CONFIG
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R100 (64h)
SE2_RETUN
E_CONFIG
1
SE2_RETUNER
__ENA
0
SE2 Right channel ReTune filter enable
0 = Disabled
1 = Enabled



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