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WM8944BECS/R 数据表(PDF) 147 Page - Cirrus Logic |
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WM8944BECS/R 数据表(HTML) 147 Page - Cirrus Logic |
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147 / 165 page  WM8944B Rev 4.3 147 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 01111 : 3dB 10000 : 4dB 10001 : 5dB 10010 : 6dB 10011 : 7dB 10100 : 8dB 10101 : 9dB 10110 : 10dB 10111 : 11dB 11000 : 12dB 11001 to 11111 : Reserved When the right channel 5BEQ filter is disabled the gains for each of the frequency bands must be set to 0dB. Register 9Bh SE2_5BEQ_R10G REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R156 (9Ch) SE2_5BEQ_ R32G 12:8 SE2_5BEQ_ R3G [4:0] 0_1100 Right Channel Filter Gain3 00000 : -12dB 00001 : -12dB 00010 : -10dB 00011 : -9dB 00100 : -8dB 00101 : -7dB 00110 : -6dB 00111 : -5dB 01000 : -4dB 01001 : -3dB 01010 : -2dB 01011 : -1dB 01100 : 0dB 01101 : 1dB 01110 : 2dB 01111 : 3dB 10000 : 4dB 10001 : 5dB 10010 : 6dB 10011 : 7dB 10100 : 8dB 10101 : 9dB 10110 : 10dB 10111 : 11dB 11000 : 12dB 11001 to 11111 : ReservedWhen the right channel 5BEQ filter is disabled the gains for each of the frequency bands must be set to 0dB. 4:0 SE2_5BEQ_ R2G [4:0] 0_1100 Right Channel Filter Gain2 00000 : -12dB 00001 : -12dB 00010 : -10dB 00011 : -9dB 00100 : -8dB |
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