LTC6953 datasheet(30/56 Pages) AD

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LTC6953

Rev 0

For more information www.analog.com

Preliminary Technical Data

Advance Product Information Subject to Change

Rev PrA

APPLICATIONS INFORMATION

Figure 20. Common Input Interface Configurations. All ZO Signal Traces Are 50Ω Transmission Lines

INPUT BUFFER

The LTC6953’s input buffer, shown in Figure 1, has a fre-

quency range of DC to 4.5GHz. The buffer has a partial on-

chip differential input termination of 250Ω, allowing some

160Ω

0.1µF

75Ω

30Ω

160Ω

150Ω

160Ω

0.1µF

62.5Ω

RSER

1µF

LTC6953

CML

AC-COUPLED DIFFERENTIAL CML

LTC6953

LVDS

AC-COUPLED DIFFERENTIAL LVDS

LTC6953

LVPECL

AC-COUPLED DIFFERENTIAL LVPECL

6953 F20

IN+

IN–

LTC6953

RF CLOCK

GENERATOR

50Ω OUTPUT

AC-COUPLED SINGLE-ENDED INPUT

LTC6953

CML

DC-COUPLED DIFFERENTIAL CML*

IN–

IN+

LTC6953

LVPECL

DC-COUPLED DIFFERENTIAL LVPECL*

* OUTPUT COMMON MODE LEVELS OF DC-COUPLED DRIVERS

MUST BE WITHIN THE MIN AND MAX IN± INPUT COMMON

MODE LEVELS SPECIFIED IN THE ELECTRICAL CHARACTERISTICS.

IN–

IN+

IN–

IN+

IN–

IN+

IN–

IN+

IN–

IN+

LTC6953

CMOS

SINGLE-ENDED CMOS

RSER

VCMOS

3.3V

1.8V

100Ω

30Ω

–

flexibility for an external matching network if desired.

Figure 20 shows recommended interfaces for different

input signal types.

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