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LTC6953 数据表(PDF) 12 Page - Analog Devices

部件名 LTC6953
功能描述  Ultralow Jitter, 4.5GHz Clock Distributor with 11 Outputs and JESD204B Support
PDF  56 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

LTC6953 数据表(HTML) 12 Page - Analog Devices

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LTC6953
12
Rev 0
For more information www.analog.com
Preliminary Technical Data
Advance Product Information Subject to Change
Rev PrA
BLOCK DIAGRAM
43
37
38
34
42
45
46
47
40
33
31
30
28
27
25
24
22
21
19
18
16
15
44
2
49
50
51
52
1
35
53
39
48
36
13
12
14
10
9
11
7
6
8
4
3
5
32
29
26
23
20
17
41
VIN
+
EXPOSED
PAD
STAT
CS
SCLK
SDO
VD
+
IN–
IN+
VREF
+
NC
VOUT
+
GND
SDI
GND
DDEL0
0–4095
M0 DIV
1–4096
ADEL0
0ns–1.1ns
SYNC AND
SYSREF CTRL
SERIAL
PORT
AND
DIGITAL
SIGNAL
DETECT
SD
NC
VOUT
+
OUT0+
OUT0–
OUT7+
OUT7–
VOUT
+
OUT8+
OUT8-
VOUT
+
OUT9+
OUT9–
VOUT
+
OUT10+
OUT10–
VOUT
+
VOUT
+
VOUT
+
VOUT
+
VOUT
+
VOUT
+
OUT1+
OUT1–
EZS_SRQ+
EZS_SRQ–
OUT3+
OUT3–
OUT2+
OUT2–
OUT4+
OUT4–
OUT5+
OUT5–
OUT6+
OUT6–
FILTV
DDEL1
0–4095
M1 DIV
1–4096
ADEL1
0ns–1.1ns
DDEL2
0–4095
M2 DIV
1–4096
ADEL2
0ns–1.1ns
DDEL3
0–4095
M3 DIV
1–4096
ADEL3
0ns–1.1ns
DDEL4
0–4095
M4 DIV
1–4096
ADEL4
0ns–1.1ns
DDEL5
0–4095
M5 DIV
1–4096
ADEL5
0ns–1.1ns
DDEL6
0–4095
M6 DIV
1–4096
ADEL6
0ns–1.1ns
DDEL7
0-4095
M7 DIV
1–4096
ADEL7
0ns–1.1ns
DDEL8
0–4095
M8 DIV
1–4096
ADEL8
0ns–1.1ns
DDEL9
0–4095
M9 DIV
1–4096
ADEL9
0ns–1.1ns
DDEL10
0–4095
M10 DIV
1–4096
ADEL10
0ns–1.1ns
TEMPO
NC
NC
NC
6953 BD



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