LTC6953 datasheet(6/56 Pages) AD

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LTC6953

Rev 0

For more information www.analog.com

Preliminary Technical Data

Advance Product Information Subject to Change

Rev PrA

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

tADELx

Output Analog Delay (x = 0 to 10)

ADELx = 0

ADELx = 1, fOUTx ≤ 300MHz

ADELx = 63, fOUTx ≤ 300MHz

1100

Output Analog Delay (x = 0 to 10),

Step Size

ADELx = 1 to 31, fOUTx ≤ 300MHz

ADELx = 32 to 63, fOUTx ≤ 300MHz

Output Analog Delay (x = 0 to 10)

300MHz ≤ fOUTx ≤ 2.25GHz

Note 4

Maximum Output Frequency for Analog

Delay

2.25

GHz

Temperature Coefficient of Analog Delay

ADELx = 1 to 31

0.06

%/°C

ADELx = 32 to 63

0.06

%/°C

CML Clock Outputs (OUT0+, OUT0–, OUT1+, OUT1–, OUT2+, OUT2–, OUT10+, OUT10–)

fOUT

Output Frequency

Differential Termination = 100Ω,

MODEx = 0 (Clock Mode)

4500

MHz

Differential Termination = 100Ω,

MODEx = 1, 2 or 3 (SYSREF Modes)

150

MHz

VOD

Output Differential Voltage

Differential Termination = 100Ω

350

440

520

mVPK

Output Resistance

Differential

100

Ω

Output Common Mode Voltage

Differential Termination = 100Ω

VOUT+ – 1.0

tRISE

Output Rise Time, 20% to 80%

Differential Termination = 100Ω

tFALL

Output Fall Time, 80% to 20%

Differential Termination = 100Ω

Output Duty Cycle

Differential Termination = 100Ω

tPD

Propagation Delay from IN± to OUT10

fIN = 4500MHz, Mx = 16

335

Propagation Delay from IN± to OUT10,

Temperature Variation

fIN = 4500MHz, Mx = 16

0.35

ps/°C

tSKEW

Skew, All Outputs (Note 13)

One Part, All Mx the Same, Even or 1

±10

±35

One Part, Any Mx

±30

Additional Output Delay, Mx = Odd vs Mx

= 1 or Even

Mx = 5, 11, 15, 17, 19, 25 or 27

Mx = 3, 7, 9, 13, 21, 23, 29 or 31

Power Supply Voltages

VREF+ Supply Range

3.15

3.3

3.45

VOUT+ Supply Range

3.15

3.3

3.45

VD+ Supply Range

3.15

3.3

3.45

VIN+ Supply Range

3.15

3.3

3.45

Power Supply Currents

IDDOUT

Sum VOUT+ Supply Currents

All Outputs Enabled (Note 5)

732

TBD

Typical JESD204B Application (Note 6)

570

PDALL = 1

500

µA

ICC – 3.3V Sum VD+, VREF+, VIN+ Supply Currents

Digital Inputs at Supply Levels

TBD

Digital Inputs at Supply Levels, PDALL = 1

500

µA

ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating

junction temperature range, otherwise specifications are at TA = 25°C. VREF+ = VD+ = VIN+ = VOUT+ = 3.3V unless otherwise specified

(Note 2). All voltages are with respect to GND.

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