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LTC6953 数据表(PDF) 45 Page - Analog Devices

部件名 LTC6953
功能描述  Ultralow Jitter, 4.5GHz Clock Distributor with 11 Outputs and JESD204B Support
PDF  56 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

LTC6953 数据表(HTML) 45 Page - Analog Devices

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LTC6953
45
Rev 0
For more information www.analog.com
Preliminary Technical Data
Advance Product Information Subject to Change
Rev PrA
APPLICATIONS INFORMATION
Figure 29. Block Diagram for JESD204B ParallelSync with LTC6953 Reference Distribution Design Example
CP
M0
NDIV
VCO
RDIV
LF(S)
EZS_SRQ±
SYNC AND
SYSREF CTRL
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M0
SYNC AND
SYSREF CTRL
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
EZS_SRQ±
ADC1
SYSREF
CLK
SYSREF
SYSREF
CLK
CLK
ADC2
ADC3
DEV CLK
SYSREF
MGMT CLK
FPGA
SYSREF
CLK
ADC7
SYSREF
SYSREF
SYSREF
CLK
CLK
CLK
ADC6
ADC5
ADC4
LTC6952 #1
LTC6952 #2
NDIV
RDIV
CP
REF±
M0
EZS_SRQ±
SYNC
AND
SYSREF
CTRL
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
LTC6953
REFERENCE
DISTRIBUTION
SSRQ
BIT
REF±
REF
OSC
ADC0
SYSREF
CLK
IN±
VCO±
VCO
LF(S)
VCO±
INPUT/OUTPUT TERMINATIONS AND
AC-COUPLING CAPS NOT SHOWN.
6953 F29



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