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LTC6953 数据表(PDF) 28 Page - Analog Devices |
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LTC6953 数据表(HTML) 28 Page - Analog Devices |
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28 / 56 page ![]() LTC6953 28 Rev 0 For more information www.analog.com Preliminary Technical Data Advance Product Information Subject to Change Rev PrA OPERATION STAT Output The STAT output pin is configured with the x[6:0] bits and INVSTAT of register h01. These bits are used to bit-wise mask or enable, the corresponding status flags of status register h00, according to Equation 2 and shown sche- matically in Figure 18. The result of this bit-wise boolean operation is then output on the STAT pin if TEMP0 is “0”. STAT = OR Reg00 6 : 0 [ ] AND Reg01 6 : 0 [ ] ( ) ( ) XOR INVSTAT (2) For example, if the application requires STAT to go high whenever the VCOOK flag is set, then x[2] should be set to “1” and INVSTAT should be set to “0”, giving a register value of h04. Since only VCOOK and VCOOK are used for the LTC6953, only bits x[3:2] should be used. Bits x[6:4] and x[1:0] should always be set to 0. The STAT pin may be transformed to a temperature mea- surement with internal 300µA bias current by setting bit TEMPO in register h05 to “1”. To get an approximate die temperature, a single calibration point is needed first. Measure the STAT pin voltage (VTEMPC) with the LTC6953 powered down (PDALL = 1) at a known temperature (TCAL). Then the operating temperature may be calculated in a desired application by measuring the STAT voltage (VTEMP) and using Equation 3: T = 665 • VTEMPC – VTEMP ( ) + TCAL (3) where T and TCAL are in ºC, and VTEMPC and VTEMP are in V. Note that no external bias current is required. Allow 50µs settling time after setting TEMPO to “1”. Block Power-Down Control The LTC6953’s power-down control bits are located in register h02, described in Table 11. Different portions of the device may be powered down independently. To power down individual outputs, see Table 3. Care must be taken with the LSB of this register, the POR (power-on-reset) bit. When written to “1”, this bit forces a full reset of the part’s digital circuitry to its power-up default state. Figure 18. STAT Simplified Schematic 6953 F18 X[0] 1 INVSTAT STAT TEMPO X[1] 0 X[2] VCOOK X[4] 0 X[5] 1 X[6] 0 1 0 1 0 X[3] VCOOK |
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