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LTC6953 数据表(PDF) 51 Page - Analog Devices |
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LTC6953 数据表(HTML) 51 Page - Analog Devices |
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51 / 56 page ![]() LTC6953 51 Rev 0 For more information www.analog.com Preliminary Technical Data Advance Product Information Subject to Change Rev PrA Figure 40. Example of Spurious Measurement Technique and differential input resistance (RDIFF). Use Equation 14 to calculate R1 and Equation 15 to calculate R2. R1 = RDIFF • VCM 0.44 – 0.5 ⎡ ⎣⎢ ⎤ ⎦⎥ (14) R 2 = RDIFF • VDD – VCM 0.44 – 0.5 ⎡ ⎣⎢ ⎤ ⎦⎥ (15) For receiver devices with internal 100Ω terminations, the values of R1 and R2 can be very small and will affect the overall termination impedance, leading to undesirable impedance mismatch. For this reason, the use of pulsed SYSREFs (MODEx = 3) AC-coupled into receiver parts with internal 100Ω terminations is not recommended. Settling time for pulsed SYSREF connections (Figure 39) is approximately determined by the AC-coupling capaci- tors (CAC), both the differential and common mode input resistance of the receiver device (RDIFF and RCM), and resistors R1 and R2: tsettleP ≅ 10 • RDEV • ROS RDEV + ROS ⎛ ⎝ ⎜ ⎞ ⎠ ⎟ • C AC (16) where: RDEV = 2RCM + RDIFF 2 ROS = MINIMUM(R1,R2) (17) For pulsed mode SYSREFs to work correctly with AC-coupling, tsettleP must be greater than 1000/fSYSREF, where fSYSREF is the frequency of the SYSREF pulses. Use the following procedure to achieve correct JESD204B SYSREF behavior for AC-coupled pulsed SYSREFs. These methods assume that the SYSREF outputs have already been synchronized and that the SYSREF output drivers have been disabled for power savings (PDx = 2). Pulsed SYSREFs (MODEx = 3) 1. Enable the LTC6953 SYSREF output drivers by setting PDx = 0 and set SRQMD = 1. 2. Wait for a settling period of at least tsettleP. 3. Set the receiver device to accept SYSREFs. 4. Set SSRQ or the EZS_SRQ inputs to “1” for at least 1ms, then set back to “0”. 5. Set the receiver device to stop accepting SYSREFs. 6. Disable the LTC6953 SYSREF output drivers by set- ting PDx = 2 and set SRQMD = 0. MEASURING DIFFERENTIAL SPURIOUS SIGNALS USING SINGLE-ENDED TEST EQUIPMENT Using a spectrum analyzer to measure spurious signals on the single-ended output of a clock generation chip will give pessimistic results, particularly for outputs that approximate square waves. There are two reasons for this. First, since the spurious energy is often an AC signal superimposed on the power supply, a differential output will reject the spurs to within the matching of the posi- tive and negative outputs. Observing only one side of the differential output will provide no rejection. Second, and most importantly, the spectrum analyzer will display all of the energy at its input, including amplitude modulation that occurs at the top and bottom pedestal voltage of the square wave. However, only amplitude modulation near a zero crossing will affect the clock. The best way to remove this measurement error is to drive the clock generator output differentially into a limit- ing buffer on a separate clean power supply. One of the differential outputs of the limiting buffer can then connect to a spectrum analyzer to correctly measure the spurious energy. An example of this technique using the LTC6953 as the clock generator and an LTC6955 as the limiter is shown in Figure 40. 100Ω 50Ω OUTx + OUTx – 6953 F40 LTC6953 OUTx + OUTx – LTC6955 IN+ IN – SPECTRUM ANALYZER APPLICATIONS INFORMATION |
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