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LTC6953 数据表(PDF) 27 Page - Analog Devices |
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LTC6953 数据表(HTML) 27 Page - Analog Devices |
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27 / 56 page  LTC6953 27 Rev 0 For more information www.analog.com Preliminary Technical Data Advance Product Information Subject to Change Rev PrA OPERATION ADDR MSB [6] [5] [4] [3] [2] [1] LSB R/W DEFAULT h28 MP7[4] MP7[3] MP7[2] MP7[1] MP7[0] MD7[2] MD7[1] MD7[0] R/W h00 h29 SRQEN7 MODE7[1] MODE7[0] OINV7 DDEL7[11] DDEL7[10] DDEL7[9] DDEL7[8] R/W h00 h2A DDEL7[7] DDEL7[6] DDEL7[5] DDEL7[4] DDEL7[3] DDEL7[2] DDEL7[1] DDEL7[0] R/W h00 h2B * * ADEL7[5] ADEL7[4] ADEL7[3] ADEL7[2] ADEL7[1] ADEL7[0] R/W h00 h2C MP8[4] MP8[3] MP8[2] MP8[1] MP8[0] MD8[2] MD8[1] MD8[0] R/W h00 h2D SRQEN8 MODE8[1] MODE8[0] OINV8 DDEL8[11] DDEL8[10] DDEL8[9] DDEL8[8] R/W h00 h2E DDEL8[7] DDEL8[6] DDEL8[5] DDEL8[4] DDEL8[3] DDEL8[2] DDEL8[1] DDEL8[0] R/W h00 h2F * * ADEL8[5] ADEL8[4] ADEL8[3] ADEL8[2] ADEL8[1] ADEL8[0] R/W h00 h30 MP9[4] MP9[3] MP9[2] MP9[1] MP9[0] MD9[2] MD9[1] MD9[0] R/W h00 h31 SRQEN9 MODE9[1] MODE9[0] OINV9 DDEL9[11] DDEL9[10] DDEL9[9] DDEL9[8] R/W h00 h32 DDEL9[7] DDEL9[6] DDEL9[5] DDEL9[4] DDEL9[3] DDEL9[2] DDEL9[1] DDEL9[0] R/W h00 h33 * * ADEL9[5] ADEL9[4] ADEL9[3] ADEL9[2] ADEL9[1] ADEL9[0] R/W h00 h34 MP10[4] MP10[3] MP10[2] MP10[1] MP10[0] MD10[2] MD10[1] MD10[0] R/W h00 h35 SRQEN10 MODE10[1] MODE10[0] OINV10 DDEL10[11] DDEL10[10] DDEL10[9] DDEL10[8] R/W h00 h36 DDEL10[7] DDEL10[6] DDEL10[5] DDEL10[4] DDEL10[3] DDEL10[2] DDEL10[1] DDEL10[0] R/W h00 h37 * * ADEL10[5] ADEL10[4] ADEL10[3] ADEL10[2] ADEL10[1] ADEL10[0] R/W h00 h38 REV[3] REV[2] REV[1] REV[0] PART[3] PART[2] PART[1] PART[0] R hx3† * Unused † Varies depending on revision Table 11. Serial Port Register Bit Field Summary BITS DESCRIPTION DEFAULT ADDR ADELx[5:0] OUT0 Analog Delay Setting 0 Various DDELx[11:0] OUTx Delay in ½ Input Cycles h000 Various EZMD EZSync Mode 0 h0B FILTV Input Buffer Filter 0 h02 INVSTAT Invert STAT Output 0 h01 MDx[2:0] OUTx 2N Value 0 Various MODEx[1:0] SYSREF Mode (SRQENx = 1): 0 = Free Run 1 = Gated Pulses 2 = Request Pass-Through 3 = 2SYSCT Pulses 0 Various MPx[4:0] OUTx Prescaler Value h0 Various OINVx OUTx Inversion 0 Various PART[3:0] Part Code (h2 = 6952, h3 = 6953) h38 PDALL Full Chip Power-Down 0 h02 PDVCOPK Powers Down Input Signal Detector 0 h02 PDx[1:0] OUTx Power-Down Mode: 0 = Normal Operation 1 = Output Muted to Logic “0” 2 = Power-Down Output Driver 3 = Power-Down Full Divider h0 Various POR Force Power-On-Reset 0 h02 BITS DESCRIPTION DEFAULT ADDR REV[3:0] Revision Code h38 SRQENx Enable SYNC or SYSREF on OUTx 0 Various SRQMD 0 = Synchronization Mode 1 = SYSREF Request Mode 0 h0B SSRQ Software SYNC or SYSREF Request 0 h0B SYSCT[1:0] SYSREF Pulse Count for MODEx = 3: 0 = One Pulse 1 = Two Pulses 2 = Four Pulses 3 = Eight Pulses h3 h0B TEMPO Enable temperature Measurement Diode on STAT h05 VCOOK Input Valid Flag h00 VCOOK Input Not Valid Flag h00 x[6:0] STAT Output OR Mask h04 h01 |
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